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In today's modern system-on-chips (SoCs), there are several intellectual properties (IPs) on the system to provide different functionality. However, the more complex communications on SoCs are, the harder the programmer could discover all errors before first silicon during verification. Therefore, we provide a reconfigurable unit for recording the transactions between IPs and adopt logical vector...
Developing parallel programs imposes many debugging challenges on multicore systems. Many researchers were successful to detect parallel faults in background by hardware assistance. However, it is still an urgent issue to reproduce the same faulted circumstance after faults occurred. Tracing the causality between events is a popular solution in current multicore systems, but it is limited by onchip...
In this letter, we propose a novel passive optical network (PON) architecture supporting radio-over-fiber signals and orthogonal frequency-division multiple access (OFDMA) PON signals. The architecture transports upstream multiple remote antenna's wireless signals using only one upstream wavelength. In addition, the windowed-orthogonal frequency-division-multiplexing technique is employed to mitigate...
We present a novel PON architecture supporting RoF and OFDMA signal integration without WDM lasers, and demonstrate 10-Gb/s OFDMA and three RF signals at 2.1 GHz are successfully transmitted over 20 km SMF in a 32-ONU PON.
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