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We have applied thoroughly clock gating technique to the SH-4A FPU (Floating Point Unit) core [1] while still keeping it co-operates with CPU core. As a result, 97% flip-flops in FPU is gated. And the power consumption is saved up to 78.11% in FPU, corresponding to 17.02% power consumption reducing of total CPU and FPU core in Dhrystone benchmark. This paper introduces such approach in which the clock...