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SCRs have been playing an increasingly significant role in ESD protection for CMOS technologies. A major challenge is to develop effective compact simulation models for these devices valid under ESD stress conditions. A simple macro modeling approach is presented for SPICE simulation of LVTSCR devices. The method uses advanced standard BJT and MOS models such as BSIM4 and Mextram. The simulation results...
SPICE type simulation using compact models is a very useful tool for predicting circuit performance under ESD stress conditions. However device models valid in the ESD current/voltage operating region are not widely available. This paper starts with a brief description of compact modeling for ESD devices working in snapback mode. A practical macro modeling approach for modeling snapback of MOS and...
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