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Geyser-1 is a MIPS CPU which provides a fine-grained run-time power gating (PG) controlled by instructions. Unlike traditional PGs, it uses special standard cells in which the virtual ground (VGND) is separated from the real ground, and a certain number of the sleep transistors are inserted for quick power shut-down and wake-up. In Geyser-1, the fine-grained run-time PG is applied to computational...
A dynamically reconfigurable processor array (DRPA) is consisting of a number of PEs, and its interconnection of PE array gives a large effect on the total area, energy and performance. However, there is no study of DRPAs focused on their PE network. In this paper, we designed four types of DRPAs based on MuCCRA, developed in MuCCRA(multi-core configurable reconfigurable architecture) project. They...
One of the benefits of coarse grained dynamically reconfigurable processor array(DRPA) is its low dynamic power consumption by operating a number of processing elements(PE) in parallel with low clock frequency. However, in the future advanced processes, leakage power will occupy a considerable part of the total power consumption, and it may degrade the advantage of DRPAs. In order to reduce the leakage...
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