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Engineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelizing hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with timing-predictable execution. parMERASA...
In the billion transistor era only a few architectural approaches propose new paths to improve the execution of conventional sequential instruction streams. Many legacy applications could profit from processors that are able to speed-up the execution of sequential applications beyond the performance of current superscalar processors. The Grid arithmetic logic unit (ALU) Processor (GAP) accelerates...
Runtime testing is a common way to detect faults during normal system operation. To achieve a specific diagnostic coverage runtime testing is also used in safety critical, automotive embedded systems. In this paper we propose a test architecture to consolidate the hardware resource consumption and timing needs of runtime tests and of application and system tasks in a hard real-time embedded system...
Multicore processors can deliver higher performance than single-core processors by exploiting thread level parallelism (TLP): applications are split into independent threads, each of which is mapped into a different core, reducing the execution time and potentially its worst-case execution time (WCET). Unfortunately, inter-thread interferences generated by simultaneous accesses to shared resources...
Future many-core chips are envisioned to feature up to a thousand cores on a chip. With an increasing number of cores on a chip the problem of distributing load gets more prevalent. Even if a piece of software is designed to exploit parallelism it is not an easy to place parallel tasks on the cores to achieve maximum performance. This paper proposes the connectivity-sensitive algorithm for static...
Trust is an important factor for autonomous distributed systems. Organic Computing features self-organizing techniques to manage complex distributed systems. This paper introduces two methods to measure and calculate trust values with respect to the reliability of other nodes by direct observation introducing minimum overhead. We demonstrate this approach using a simulator and show that both algorithms...
Trust is an important factor for autonomous distributed systems. Organic Computing systems feature self-organizing techniques to manage complex distributed systems. This paper introduces the delayed ack method to measure and calculate trust values of network entities based on direct observation. It is designed to do this with minimum overhead. We demonstrate the approach within our middleware OCμ...
Currently few architectural approaches propose new paths to raise the performance of conventional sequential instruction streams in the time of the billions transistor era. Many application programs could profit from processors that are able to speed up the execution of sequential applications beyond the performance of current superscalar processors. The Grid Alu Processor (GAP) is a runtime reconfigurable...
Currently few architectural approaches propose new paths to raise the performance of conventional sequential instruction streams in the time of the billions transistor era. Many application programs could profit from processors that are able to speed up the execution of sequential applications beyond the performance of current super scalar processors. The Grid Alu Processor (GAP) is a runtime reconfigurable...
Theoretical real-time research generally neglects context switch times. But in recent embedded applications which consist of dozens of threads with very short execution times, their impact is too serious to be ignored. We present a hard real-time scheduling algorithm that perfectly hides the context switch times of an arbitrary number of threads. It requires a Simultaneous Multithreaded (SMT) processor...
Energy consumption is often a hard constraint of embedded real-time systems. Modern processors provide techniques for dynamic voltage and frequency scaling to reduce energy consumption. However, while the processor possibly operates at a lower clock frequency, the running applications should still meet their deadlines and thus set some limits to the use of scaling techniques. In this paper, we propose...
The Merasa project aims to achieve a breakthrough in hardware design, hard real-time support in system software, and worst-case execution time analysis tools for embedded multicore processors. The project focuses on developing multicore processor designs for hard real-time embedded systems and techniques to guarantee the analyzability and timing predictability of every feature provided by the processor.
Current emerging reconfigurable coarse grained processors are gaining more popularity, as they introduce a new way for more dynamicity similar to FPGA and tend to achieve the performance of application specific hardware. An adaptive architecture can face the diversity of applications dynamically in the hardware without the need of any software manipulation. However the need for more flexibility to...
This paper proposes a new processor architecture optimized for execution of sequential instruction streams. The architecture, called Grid Alu Processor (GAP), comprises an in order superscalar pipeline front-end enhanced by a configuration unit able to dynamically issue dependent and independent standard machine instructions simultaneously to the Arithmetic Logic Units (ALUs) organized in a two-dimensional...
To provide valuable services in ubiquitous and pervasive computing, it is necessary to estimate the location of users or objects in the environment. The Global Positioning System (GPS) has supported many applications using outdoor location estimation, but there is still a need for alternative technologies in buildings. Assuming that multiple wireless sensors will be attached to ubiquitous environments,...
In recent years, the potential range of applications for sensor networks is expanding. Their use has been considered for safety critical areas such as: hospitals or power plants. The security comes more to the fore. This paper presents SecSens, an architecture that provides basic security components for wireless sensor networks. Since robust and strong security features require powerful nodes, SecSens...
We developed an SMT processor that allows a static WCET analysis of several hard real-time threads and uses the remaining resources for soft or non real-time threads. The analysis is possible, because one Dominant Meta Thread (DMT) is executed as if it were the unique thread on the processor and thus single-threaded WCET techniques can be applied. To provide more than one hard real-time thread the...
Ubiquitous and pervasive computing envisions context-aware systems that gather real world information from many fixed and mobile microchips and sensors integrated in everyday objects. To provide valuable services, it is necessary to estimate the location of users or objects. Outdoor location tracking is achieved by Global Positioning System (GPS), but due to its poor indoor coverage, there is a need...
Failure detectors are a fundamental part of safe fault-tolerant distributed systems. Many failure detectors use heartbeats to draw conclusions about the state of nodes within a distributed environment. The contribution of this paper is an approach whose benefits are twofold. On the one hand it reduces the network overhead produced by heartbeat-style failure detectors. On the other hand it improves...
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