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This paper presents the architecture and the circuit implementation of a direct digital frequency synthesizer (DDFS) with error compensation. The straight line approximation method with a 10-bit amplitude resolution is adopted in this work. The proposed technique replaces conventual ROM-based methods with a nonlinear digital-to-analog converter (DAC) to generate the sinusoid. The overall power dissipation...
A direct digital frequency synthesizer (DDFS) using on-chip CMOS one-time programmable read-only memory (OTP ROM) are presented. A straight-line approximation algorithm for sinusoid with compensation is adopted such that the accuracy could be maintained and the cost is reduced. Most important of all, a CMOS OTP ROM is employed as a look-up ROM table to simplify the ROM fabrication without any additional...
This paper presents the architecture as well as the circuit implementation of a direct digital frequency synthesizer (DDFS) with error compensation. The proposed DDFS based on the straight line approximation with a 10-bit amplitude resolution. The proposed technique replaces the conventional ROM-based phase-to-amplitude conversion circuitry and the linear digital-to-analog converter with a nonlinear...
A ROM-less direct digital frequency synthesizer employing trigonometric quadruple angle formula is present in this paper. The worse case spectral purity is better than -130 dBc. The amplitude resolution is up to 13 bits, while the phase resolution is 12 bits. Neither any scaling table nor error correction tables are required. The maximum error is mathematically analyzed. The word length of each multiplier...
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