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A fully integrated LC VCO with 1V low voltage supply, applied in the frequency synthesizer for wireless sensor network applications, is designed and implemented in TSMC 0.18μm RF/MS CMOS process with low power consumption and good phase noise performance. To address the problem caused by low voltage, the structure of VCO is carefully selected. A 4 bit switched capacitor array is used to widen tuning...
Based on 0.18μm RF CMOS process, a 4th-order Butterworth low-pass filter (LPF) used in reconfigurable wireless receivers (for WCDMA and GPS/Galileo) is presented in this paper. The LPF adopts active-Gm-RC structure, and can satisfy both WCDMA and GPS/Galileo requirements, which maximizes hardware reuse. A RC time constant auto-tuning circuit is applied to improve the accuracy of bandwidth. The chip...
Wireless sensor network (WSN) can be widely used in many fields. Based on 0.18μm RF CMOS process, this paper presents a 4.8GHz 1V low phase noise LC voltage controlled oscillator (VCO) used in the frequency synthesizer for WSN applications. In order to work under 1V voltage, the LC VCO uses the structure of only one couple of NMOS differential negative resistances. The core circuit is biased by PMOS...
This paper presents a 1V low-voltage high speed frequency divider-by-2 which is fabricated in a standard 0.18μm TSMC RF CMOS process. Employing parallel current switching topology, the 2:1 frequency divider operates up to 6.5GHz while consuming 4.64mA current with test buffers at a supply voltage of 1V, and the chip area of the core circuit is 0.065×0.055mm2.
In this paper, an open looped fast automatic frequency calibration (AFC) unit used in 2.4GHz CMOS integer-N phase-locked loop (PLL) frequency synthesizer (FS) for IEEE802.15.4/ZigBee wireless sensor networks (WSN) is presented. The calibration method accomplishes efficient search for an optimum discrete tuning curve of the voltage controlled oscillator (VCO) among a group of frequency sub-bands. The...
As the key blocks of PLL (phase locked loop) circuits, PFD (Phase Frequency Detector) is dominated to the precision and stability of system, whereas CP (Charge Pump) offers a wide scale of frequency capture scale and fast locked performance. The structure of PFD using transfer gate dynamic D flip-flops and the structure with a wide input scale error amplifier for CP had been presented to achieve a...
A fully integrated LC voltage controlled oscillator (VCO) with 1V low voltage supply, applied in the frequency synthesizer of 2.4GHz IEEE802.15.4/ZigBee Wireless Sensor Network (WSN), is designed and implemented based on TSMC 0.18µm RF/MS CMOS process with low power dissipation and excellent phase noise performance. The possible structures under 1V voltage supply are compared and this paper uses PMOS...
In this paper, a sample-and-hold circuit for a reconfigurable ADC is presented. This design is based on TSMC 0.18µm process. Flip-around architecture is employed to implement overall circuit which may contribute to low noise and fast settling with consuming lower power. To achieve high linearity, improved bootstrapped switches are introduced in this design. A fully differential folded-cascode OTA...
This paper presents a flexible Programmable Gain Amplifier (PGA) with DC Offset Cancellation (DOC) for reconfigurable direct-conversion receiver. This circuit is designed for reconfiguration of GPS/Galileo and WCDMA dual mode receiver in order to reduce power consumption, because it consumes different current and provides different bandwidths in different working conditions. This PGA consists of one-stage...
A 5GHz low-voltage CMOS integer-M frequency divider whose modulus can be varied from 2403 to 2480 for WSN applications is presented in this paper. The divider contains two blocks, a dual-modulus prescaler (DMP), which adopts the structure of the pseudo-differential static D-type flip-flop, and a pulse-swallow counter. The whole frequency divider is designed in 0.18μm CMOS process and the simulation...
Based on TSMC 0.18μm RF CMOS process, a 4th-order Butterworth low-pass filter (LPF) used in a multi-mode and multi-standard wireless receiver (for WCDMA and GPS/Galileo) is presented in this paper. The LPF adopts active-gm-RC structure, and can satisfy both WCDMA and GPS/Galileo bandwidth requirements, which maximizes hardware reuse. In order to improve the accuracy of the bandwidth, a RC time constant...
In this paper, design methods of Sample and Hold (S/H) circuit are discussed and gm/id method in OTA (Operational Transconductance Amplifiers) design is applied. Based upon the discussion, circuit design develops from the signal modeling, which would make circuit design concisely and easily. This work is elaborated in details by TSMC 0.18μm CMOS process. Folding telescope structure is applied for...
In this paper, a fast parallel acquisition unit with combination of data and pilot components for Galileo CBOC receiver is presented. Due to secondary code and high rate data, the coherent time is limited by bit transition, so code serial acquisition in this unit is adopt while carrier frequencies are scanned in parallel based on FFT. Coherent time can be extended with the assistant of secondary code...
A 4.8GHz low phase noise and low power consumption LC voltage controlled oscillator (VCO) used in frequency synthesizer for Wireless Sensor Network (WSN) applications is designed and implemented based on TSMC 0.18μm RF CMOS process. Complementary differential negative resistance LC oscillator structure is adopted to achieve low power consumption. The core circuit is biased by current so as to reduce...
In this paper, the sources of DC offset in the front-ends of wireless systems are discussed and corresponding DC offset cancellation techniques are analyzed. Upon the discussion, a DC negative feedback technique based DC offset canceller, which is concise and easy to be integrated on chip, is elaborated in details by SMIC 0.18μm CMOS process. DC offset detector is an integral part of DC offset canceller...
This paper designs and implements an direct up-conversion mixer based on RF CMOS process, which can be used in the up-link radio frequency (RF) front-end of a 2.4 GHz wideband wireless system such as multimedia wireless sensor network (WSN). Firstly, Gilbert cell-based double-balanced structure is adopted in this design, which can effectively suppress the feed-through of the local oscillator (LO)...
In this paper, a programmable gain amplifier (PGA) for wireless sensor network (WSN) is proposed and implemented using 0.18 μm CMOS process. A fully differential feedback configuration is adopted, and the variable gains are achieved by switch controlled resistor (SCR) network. DC feedback technique is also utilized to eliminate the DC offset. SCR network layout design is essential to maintain the...
In this paper, the sources of DC offset and the corresponding DC offset cancellation techniques are analyzed. A DC negative feedback technique based DC offset canceller (DOC) is designed in details and implemented by SMIC 0.18μm CMOS process. DC offset detector is an important part of DOC. In this paper, an on chip DC offset detection circuit is proposed for the DC negative feedback canceller which...
A fully integrated double frequency differential LC voltage controlled oscillator (VCO), used in the frequency synthesizer of 2.4GHz IEEE802.15.4/ZigBee Wireless Sensor Network (WSN), is designed and implemented based on TSMC 0.18μm RF CMOS process with low power dissipation and wide tuning range. The core circuit adopts complementary differential negative resistance LC oscillator structure and is...
In this paper, a low dropout voltage regulator (LDO) for radio frequency (RF) circuits of IEEE802.15.4/ZigBee wireless sensor network (WSN) is proposed and implemented by using TSMC 0.18μm CMOS process. Bandgap reference circuit startup problem and stability of LDO are key problems of LDO circuit design, and their reasonable solutions are given in this paper. Chip measurement results demonstrate that...
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