The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A detailed synthesis study has been performed on a functional unit from a recent IBM microprocessor to explore the voltage-frequency space for energy-efficient design points across a wide performance spectrum ranging from 625 MHz at 0.48V to 5.6 GHz at 0.95V. It is found that the optimal operating voltage depends strongly on frequency for an energy-efficient design. Circuit characteristics, as represented...
The scale of technology node increases power-density dynamically. Various techniques are proposed to reduce the power consumption. One approach is Dual-Supply Voltage (DSV).DSV is to apply a lower supply voltage on selected non-critical gates for power saving while maintaining chip performance at the same time. In order to facilitate the power design in DSV, the same voltage gates are grouped to form...
Power consumption has become a major consideration in nanometer chip design. Since the dynamic power is proportional to Vdd2, and the static power is proportional to Vdd, lowering power supply voltage is an efficient method to reduce the power usage. In this paper, we adopt the row-based dual-supply voltage (DSV) scheme. DSV assigns a low power supply voltage to timing noncritical gates for the power...
64-bit adders of various prefix algorithms are designed using a novel dataflow synthesis methodology. Our synthesis methodology offers robust adder solutions typically used for high-performance microprocessor needs. We have analyzed the power-performance tradeoffs for a portfolio of popular adder topologies and design styles. In particular, the intrinsically sparser designs in hierarchical prefix...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.