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This paper presents an end-to-end high frequency class S power amplifier. A description of the full testbench and some important points on generation of RF outputs from FPGA devices and current mode class D design are given. Experimental measurements are provided for the prototype PA consisting of a signal generator, analog to digital converter, driver circuit, current mode class D switching stage...
In this paper a platform that implements the digital processing and RF carrier generation for class S PA operation is presented. This implementation consists of a bandpass delta sigma modulator (DSM) with a multi-level quantizer followed by a pulse width modulator and frequency upconversion stage. The principle of operation is described and validation is provided through simulation and experimental...
When a delta-sigma modulator (DSM) is placed before a class D switching stage the combination can be used to amplify time varying envelope signals. However a bandpass DSM is commonly employed and is required to have a sampling frequency approximately four times the carrier frequency. At RF or microwave frequencies proprietary hardware was previously needed to implement the DSM. However, it is shown...
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