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Dedicated hardware implementations of artificial neural networks promise to provide faster, lower power operation when compared to software implementations executing on processors. Unfortunately, custom hardware implementations do not support intrinsic training of these networks on-chip. Training is typically done using software simulations and the obtained network is synthesized and targeted to hardware...
Field-programmable gate arrays (FPGAs) have been used to accelerate DoD-related applications with promising performance. However, current development tools require significant hardware knowledge and are not amenable to the increasing complexity of FPGA-based systems. The application requirements are expected to change dramatically for future use cases, and require a well defined development methodology...
Performance and versatility requirements arising from escalating fabrication costs and design complexities are making reconfigurable computing technologies increasingly advantageous on the roadmap towards many-core technologies. This reformation in device architectures is necessitating a critical reformation in application design methods to bridge the widening semantic gap between design productivity...
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