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This paper presents the measured results and characterisation of a 1.2 V CMOS low phase noise quadrature output phase locked loop (PLL) with an on-chip regulated DC-DC converter. In particular, it exhibits a phase noise response of less than -115 dBc/Hz at an offset of 1 MHz from the carrier and has a tuning range of over 38%. The automatic amplitude control loop in the VCO gives the facility to trade-off...
This paper presents the design of a 1.6 GHz quadrature phase locked loop for GPS applications, operated with a supply voltage of 1.2 V and dissipating a current of less than 5 mA. It is capable of delivering quadrature locked signals in the range from 1.22 GHz to 1.96 GHz with a phase noise response of less than 115 dBc at an offset of 1 MHz from the carrier. The wide tuning range is obtained using...
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