The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
We describe continuous time, rail to rail, gain enhanced voltage amplifiers with a gain error which is almost insensitive to mismatch of active devices. Though the proposed approach is general, as a preliminary test we have designed a voltage amplifier in a standard 0.35 mum CMOS process; Montecarlo and AC simulations demonstrate a significant gain enhancement, its robustness against spread of process...
We describe the first ever reported continuous time, gain enhanced voltage amplifiers which are almost insensitive to mismatch of active devices. Though the proposed approach is general, as a preliminary test we have designed a voltage amplifier in a standard 0.35?m CMOS process; Monte Carlo simulations demonstrate both a significant gain enhancement and its robustness against spread of process parameters.
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.