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This paper presents the design of a Ku-band CMOS low noise amplifier (LNA) with noise reduction and gain improvement. A transformer feedforward gm-boosting technique is employed in a single-ended common-gate LNA to reduce the noise figure (NF) and improve the gain simultaneously. A single cascode is the second stage of the LNA. Fabricated in 0.18um RF CMOS process, the LNA exhibits a minimum noise...
A growing number of on-chip inductors have been applied in the millimeter-wave IC design. The coupling effects between them have a negative impact on the performance of the circuit and each on-chip inductor. In this paper, a new equivalent-circuit model and a parameter extraction method for multiple on-chip inductors in the millimeter-wave region are proposed. The impacts of coupling effects on every...
This paper summarizes the developments of millimeter-wave (mmW) CMOS power amplifiers (PAs) at University of Electronic Science and Technology of China in recent years. Harmonic control technology and inverse Class F technique are used to improve the power added efficiency (PAE) for mmW CMOS PAs effectively. Moreover, by realizing symmetrical voltage coupling between transformer primaries and secondary...
This paper presents a 60GHz planar on-chip antenna fabricated with a standard 0.18-μm CMOS process. The antenna has a U-shaped radiating patch, which is fed by a 50-Ω coplanar waveguide (CPW). It has a compact size of 1.5mm × 1.5mm × 0.26mm. The simulation work is optimized by using an FEM-based 3-D commercial EM software Ansoft HFSS. Simulated results shows that the on-chip antenna has a good impedance...
This paper presents a 60GHz planar on-chip antenna fabricated with a standard 0.18-μm CMOS process. The antenna has a U-shaped radiating patch, which is fed by a 50-Ω coplanar waveguide (CPW). It has a compact size of 1.5mm × 1.5mm × 0.26mm. The simulation work is optimized by using an FEM-based 3-D commercial EM software Ansoft HFSS. Simulated results shows that the on-chip antenna has a good impedance...
In this paper, a Q-band CMOS low noise amplifier (LNA) exploiting transformer positive-negative feedback and noise cancelling is presented. The proposed low noise amplifier consists of a positive transformer feedback to achieve noise-reduction and a negative transformer feedback to obtain good reverse isolation and stability. The noise cancellation technique is applied in this LNA to achieve a low...
A three stages 60GHz low noise amplifier (LNA) is implemented in 90nm CMOS process. An interstage impedance matching technique is adopted to reduce noise figure and improve gain. The LNA, which consists of two common source stages followed by a cascode stage, has a peak gain of 18dB at about 60GHz with a minimum noise figure (NF) of 4.7dB, especially, the NF below 5dB over the frequency band of 57–67GHz...
This paper presents a new technique for the design of broadband variable gain amplifiers (VGA). The proposed technique uses current diversion concept to provide gain variation function for the broadband amplifier. Since gain variation is achieved without compromising voltage headroom, it facilitates low power design of the VGA. Since DC levels of output signals of each stage stay constant, it also...
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