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In this paper, we present a simulation study of short-channel characteristics of self-aligned dual-channel source/drain-tied (SA-DCSDT) MOSFETs. Two compared devices are designed, namely, the normal SA-DCSDT MOSFET and the ultimate SA-DCSDT MOSFET. According to simulation results, the DC is used to obtain a high drain saturation current, the SDT is used to get improved thermal stability, and the BOX...
In this paper, we focus on the electrical characteristics of the partially insulating oxide (PiOX) junctionless vertical MOSFET (JLVFET) and PiOX junction vertical MOSFET (JVFET) through computer simulations. It is clear that the PiOX JLVFET process is simple due to the absence of the source/drain (S/D) implantation and annealing, thereby reducing the fabrication cost, in whereas the PiOX JVFET needs...
This paper presents a highly scalable π-shaped source/drain (π-S/D) quasi-silicon-on-insulator (SOI) MOSFET and summarizes its preliminary characteristics compared with the recessed S/D SOI MOSFET and international technology roadmap for semiconductors (ITRS) roadmap values. SiGe-Si epitaxial growth, Si and SiGe etching, growth of epitaxial Si, and selective SiGe removal are used to form the π-S/D...
This paper aims to investigate the performance and reliability trade-off of the self-aligned (SA) pi-shaped source/drain (S/D) ultrathin silicon-on-insulator (UTSOI) field-effect transistors (FETs). Based on the simulations, the S/D-tie effects are crucial to the future of quasi-SOI devices. The preliminary results of electrical characteristics of the SA-piFETs are carefully demonstrated.
In this paper, we propose a novel self-aligned silicon-on-insulator (SOI) MOSFET with Omega-shaped conductive layer and source/drain-tie (SA-OmegaCFET). Based on the TCAD 2D simulation results, we find that combining the applications of a nature Source/Drain (S/D) tie with a recessed S/D region can effectively improve the issue of self-heating effects, but without losing control of the short-channel...
In this paper, the polysilicon thin-film transistor with multi-trenched body is fabricated and investigated that manifests off-state leakage suppression without degrading on-state current and other electric performances. The reason is that the leakage path can be separated by the multi-trenched body and the carrier scattering through the polysilicon grain-boundary traps can also be minimized. Furthermore,...
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