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This paper presents an overview of test techniques that offer promising features when Built-In-Self-Test (BIST) must be applied to complex integrated systems including analog, mixed-signal and RF parts. Emphasis is on techniques exhibiting a good trade-off between test requirements (basically in terms of signal accuracy and frequency) and test quality.
A simple on-chip procedure for testing embedded RF blocks is presented. It is based on the detection and spectral analysis of the two-tone response envelope of the device under test (DUT). A main difference with similar methods is its inherent simplicity, avoiding a preprocessing stage and resorting to simpler circuitry to process the envelope. As a consequence, the main nonlinearity specifications...
This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and spectral analysis of the two-tone response envelope of the block under test. The main non-linearity specifications of the block under test can be easily extracted from the envelope signal. The analytical basis of the proposed methodology is demonstrated,...
This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and spectral analysis of the two-tone response envelope of the block under test. The main non-linearity specifications of the block under test can be easily extracted from the envelope signal. The analytical basis of the proposed methodology is demonstrated,...
This paper presents practical implementations of test cores for analog and mixed-signal BIST. A sinewave generator for test stimulus generation, and a periodical signal characterization system for response evaluation are discussed. Integrated prototypes and experimental results are provided, and a prototype of a network/spectrum analyzer featuring both test cores has been developed and tested in the...
This paper presents a practical implementation of a network analyzer for analog BIST applications. The network analyzer consists of a sinewave generator and a sinewave evaluator based on switch-capacitor techniques. Both the generator and the evaluator have been integrated in a 0.35 mum CMOS technology. The functionality of the system has been proved in the lab. For this purpose, a demonstrator board...
This paper reports a new built-in self-test scheme for analog and mixed-signal devices based on die-level process monitoring. The objective of this test is not to replace traditional specification-based tests, but to provide a reliable method for early identification of excessive process parameter variations in production tests that allows quickly discarding of the faulty circuits. Additionally, the...
This paper proposes an analog sinewave signal generator with minimal circuitry resources. It is based on a linear time variant filter that gives a high quality sine signal in response to a DC input. The proposed architecture has the attributes of digital programming and control capability, robustness and reduced area overhead, what make it suitable for BIST applications. Experimental results from...
This paper presents an integrated prototype of a mixed-signal sinewave analyzer. It extracts, in the digital domain, the DC level and the amplitude of the harmonics of a distorted analog sinewave signal. It is based on a double modulation, squarewave and sigma-delta, together with a simple digital processing algorithm. The presented prototype has been integrated in a 0.35 mum technology. It is intended...
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