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Accurate extraction of the parasitic parameters on a printed circuit board (PCB) and establishment of a new design method for high-power density by considering the parasitic components will become major technological issues to increase the power density of converters. This study focuses on the time domain reflectometry (TDR) technique for the effective measurement of parasitic parameters on PCBs with...
We investigated Vth fluctuations due to random telegraph signal (RTS) on gate work function control in Hf-doped silicate gate stack compared with the conventional impurity doping. Complex RTS were recognized for both n- and p-MOSFET. The WFC does not appreciably affect Vth fluctuations for n-and p-MOSFET. However, dopant contributes to Vth fluctuation, especially for the p-MOSFET. We found it is caused...
Energy Semiconductor Electronics Research Laboratory in AIST has developed an integration design methodology for high power density converters. A part of this work, a novel converter loss estimation method based on power converter platform concept was proposed. The proposed method estimates the converter loss exactly under real circuit operation condition, by taking the correlation among converter...
This paper discusses noise currents in a control or gate-drive circuit of a 200-kHz PWM inverter. When the MOSFETs of the inverter are turned-on or -off, the noise current flows into the control and drive circuits. As a result, a malfunction in the controller of the inverter may occur. The equivalent circuit for the noise current is estimated from the experimental waveforms. This paper discusses three...
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