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Clock gating is a useful technique to reduce power consumption of a synchronous sequential circuit. Conventionally, we use activity patterns, which are derived from a scheduled data flow graph and a module binding solution, to represent enable logics for clock gating. Based on activity patterns of modules, previous works utilize AND gates to construct activity-driven clock trees. In this paper, we...
Content Centric Networking (CCN) is one of the representative Information Centric Networking (ICN) architectures. In CCN, data objects are accessed instead of end hosts, and each router maintains a large size of routing table consisting of all name prefixes announced by content servers. To improve the scalability of CCN, an alternative name space relating to Router IDentifier (RID) has been proposed...
The proposed identification system for mixed anuran vocalizations is to provide the public to easily consult online. The raw mixed anuran vocalization samples are first filtered by noise removal, high frequency compensation, and discrete wavelet transform techniques in order. An adaptive end-point detection segmentation algorithm is proposed to effectively separate the individual syllables from the...
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Existing leakage reduction techniques for hard real-time systems utilize slack to turn off a CPU completely. However, turning on/off a processor involves high performance and energy overheads. Hence, a hard real-time system is very likely to have unutilized slack if only the CPU shutdown technique...
Carbon nanotubes (CNTs) are novel quasi-one-dimensional materials with excellent electrical properties in addition to their remarkable mechanical strength, thermal conductivity and chemical inertness. Moreover, semiconducting CNTs are direct-gap semi-conductors that directly absorb and emit light. This offers the possibility of developing a CNT-based electric and optoelectronic technology.
Many low power CMOS 1-bit full adder cells, formed by transmission gates, have been presented recently. However, the performance of low power adders, directly formed by those 1-bit full adder cells, is not the best. This paper presents a new tapered transmission gate that decreases the propagation delay in the carry chains without increasing power consumption. The design provides an alternative and...
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