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FinFET device, the promise one of all candidates which may extend CMOS scaling to 10nm and beyond, has attracted intensive research interest in recent years. In paralleling the process technology and circuit design methodology, a compact model which serves as a link between the process technology and circuit design is strongly demanded. In this paper, we first review the FinFET process technology...
ULTRA-SOI is a new generation of the channel-potential-based non-charge-sheet model for the dynamic depletion (DD) Silicon-On-Insulator (SOI) MOSFET, developed by TSRC group in EECS department of Peking University with many year efforts. The model is formulated with a fully physical derivation from the Poisson's equation to solve the potential along the vertical direction of the silicon film. The...
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