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Negative Bias Temperature Instability (NBTI) induced transistor aging has become one of the major reliability concerns in sub-micron circuit as technology scales. Transistor performance degrades over time and may eventually cause timing violations and circuit failure. Multi-Vth is known as a method to improve circuit performance with leakage and timing tradeoffs. In this paper, we propose a heuristic...
Bias Temperature Instability (BTI) has become a serious reliability issue for digital circuits. BTI-induced transistor aging degrades transistor performance over time and may eventually induce circuit failure due to timing variations. The leakage power dissipation is another concern as technology scales. While multiple Vth and pin reordering are know as to reduce power leakage, both methods would...
In this paper, we analyze the impact of asymmetrical aging due to Bias Temperature Instability (BTI) in the clock tree segments of power efficient designs. The nonuniform aging of launch and capture clock segments could not only violate the setup timing but also result in gross hold violations. Aging in clock networks also results in pulse width compression which impacts the half-cycle paths' timing...
Processes to produce active-matrix backplanes on plastic substrates have been developed utilizing a-Si:H, multi-component oxide, and organic semiconductor technologies. The suitability of these technologies for future flat panel display applications is discussed. Of these material systems multi-component oxides exhibit highest field-effect mobilities (10cm2/Vs for zinc tin oxide demonstrated), followed...
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