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A 30GSsps 6bit current-steering digital-to-analog converter (DAC) in SiGe BiCMOS technology is present in this paper. The DAC core works in a double-sampling way, which reduces the maximum clock frequency by half. In order to suppress the frequency spur induced by double-sampling, a duty cycle correction circuit is implemented. 24 high speed serial data receivers running up to 7.5Gbps per-lane and...
A 32-bit direct digital frequency synthesizer with a maximum operating frequency of 4.5 GHz fabricated in 0.25 µm SiGe HBT is presented. The phase-to-amplitude mapping circuit is implemented with nonlinear DAC coarse quantization and ROM-based piecewise linear interpolation. The measured SFDR is between 46 dBc and 60 dBc under a 4.0 GHz clock and the hopping time is less than 10 ns. This chip occupies...
By designing oxidation-reduction reaction, epitaxial growth of silicon-germanium (Si1−xGex: 0≤x≤1) films on Si(001) at low temperature has been achieved using reactive thermal CVD (RTCVD). Si2H6 and GeF4 are used as source gases. The temperature dependence of growth kinetics has been investigated. The results indicate that films grown at high temperature tend to be polycrystalline; on the contrary,...
In this paper, a low cost 4GS/s 8bit Folding-and-Interpolation (F&I) ADC has been demonstrated. To avoid threshold-mismatch and delay-mismatch between coarse and fine quantizer, a novel coarse quantizer with analog pre-processing circuits are proposed. According to the measurement result, the proposed coarse quantizer has successfully eliminated the glitch code. The ADC is capable of sampling...
In this paper we present a 2GSps 12bit current steering digital-to-analog converter (DAC), in 100G Ft 0.18µm SiGe HBT technology. An improved switching sequence is proposed to compensate the gradient error and reduce the impact of cell-dependent-delay-variation. According to measured results, the test chip achieved a DNL/INL of 0.6/0.95 LSB respectively. The measured SFDR at low frequency is above...
This paper presents an ultra-high-speed direct digital frequency synthesizer (DDS) microwave monolithic integrated circuit (MMIC) implemented in 1μm GaAs HBT technology. The DDS has the capabilities of direct frequency modulations with 8-bit frequency resolutions. Utilizing a Double-Edge-Trigger (DET) 8-stage pipeline accumulator with sine-weighted DAC based ROM-less architecture, this DDS MMIC can...
This paper presents a 10GHz 8-bit Direct Digital Synthesizer (DDS) Microwave Monolithic Integrated Circuit (MMIC) implemented in 1μm GaAs HBT technology. The DDS takes a Double-Edge-Trigger (DET) 8-stage pipeline accumulator with sine-weighted DAC based ROM-less architecture, that can maximize the utilization ratio of GaAs HBT's high-speed potential. With an output frequency up to 5GHz, the DDS gives...
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