The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, we proposed an optical encryption /decryption system based on all-optical shift register. The key used for encryption and decryption is an all-optical pseudorandom bit sequence (PRBS). By analysing the performance of the core functional unit of this system, which is composed of SOA-based logic XOR and all-optical clocked D flip-flops, we demonstrated the system's capability of producing...
A 30GSsps 6bit current-steering digital-to-analog converter (DAC) in SiGe BiCMOS technology is present in this paper. The DAC core works in a double-sampling way, which reduces the maximum clock frequency by half. In order to suppress the frequency spur induced by double-sampling, a duty cycle correction circuit is implemented. 24 high speed serial data receivers running up to 7.5Gbps per-lane and...
In this paper, a time-interleaved 30GS/s 6bit ADC fabricated in 0.18µm SiGe BiCMOS technology has been demonstrated. A bandwidth boosting technique and packaging solution has been proposed which enables the ADC to achieve input bandwidth over 18GHz. A full data rate interface is integrated to transmit all the data in real time. The ADC has a SFDR >35dBc over the entire Nyquist frequency. An effective...
A method for loop circuit stability analysis is introduced through investigating its closed-loop admittance and open-loop impedance. This method has wider adaptability and less limitation than the traditional approach which uses open-loop power-wave transfer function. A 6-GHz HBT oscillator is designed to verify this method. The measurement result shows the effeteness of the proposed method while...
This paper presents an ultra-high-speed direct digital frequency synthesizer (DDS) microwave monolithic integrated circuit (MMIC) implemented in 1μm GaAs HBT technology. The DDS has the capabilities of direct frequency modulations with 8-bit frequency resolutions. Utilizing a Double-Edge-Trigger (DET) 8-stage pipeline accumulator with sine-weighted DAC based ROM-less architecture, this DDS MMIC can...
A 64 × 3-bit read-only memory (ROM), employing dual decoder architecture, is designed in GaAs HBT technology. It is adopted in Direct Digital Synthesizer (DDS) for phase-to-amplitude conversion. To enhance the performance of the ROM, the memory cell is designed with a transistor to assign both a high and low bit value. The ROM draws a current of 130 mA from a -4.6 V power supply. Using 700 GaAs HBT...
This paper proposes a new DDS architecture combined with Nonlinear DAC and Wave-Correction-ROM (WCR) which shows both high operating speed and accuracy. Based on this architecture, a 6 GHz 8-bit DDS MMIC is designed and fabricated in 60 GHz GaAs HBT Technology. The DDS MMIC includes 8-bit pipeline accumulator, an 8×8×3 bits WCR, two combined DACs and an analog Gilbert Cell for sine-wave generation...
This paper presents a 10GHz 8-bit Direct Digital Synthesizer (DDS) Microwave Monolithic Integrated Circuit (MMIC) implemented in 1μm GaAs HBT technology. The DDS takes a Double-Edge-Trigger (DET) 8-stage pipeline accumulator with sine-weighted DAC based ROM-less architecture, that can maximize the utilization ratio of GaAs HBT's high-speed potential. With an output frequency up to 5GHz, the DDS gives...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.