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In this work, the potential of Si1−xGex Quantum Wells (SiGe QW) for future DRAM periphery transistors and more generally for Low Power applications is investigated. It is shown that an increase of Ge content in the channel leads to a significant reduction of threshold voltage and to an increase of long channel mobility. However, an increase of external resistance is observed for Si1−xGex Quantum Well...
In this paper, the feasibility of High-k/Metal Gate (HKMG) Replacement Metal Gate (RMG) stacks for low power DRAM compatible transistors is assessed. It is shown that traditional RMG gate stacks cannot be used because of the additional anneal needed in a DRAM process. New solutions are developed, and a PMOS stack HfO2/TiN with TiN deposited in three times combined with Work Function metal oxidations...
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