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As Cloud-deployed applications became more and more mainstream, continuously more complex services started to be deployed. The deployment involves multiple-layered systems and application itself. Where, failure of any point will disrupt the whole availability and auto-healing is one of the most indispensable features of the Cloud management. The micro-service model and Cloud management platform decouples...
The calculation of small-scale data is commonly used in scientific computing and application domain, and the high-efficiency method of small calculation can give play to the potency of many calculation and application. In this paper, a novel self-adaptive parallel computing method based on the graphics processing unit (GPU) architecture for batches of small scale computing tasks is proposed herein...
Full correlation matrix analysis (FCMA) is an unbiased approach for exhaustively studying interactions among brain regions in functional magnetic resonance imaging (fMRI) data from human participants. In order to answer neuroscientific questions efficiently, we are developing a closed-loop analysis system with FCMA on a cluster of nodes with Intel® Xeon Phi™ coprocessors. Here we propose several ideas...
In this paper we address the problem of large image retrieval from millions of images. Recently, deep convolutional neural network has demonstrated superior performance in a number of computer vision applications. We propose to adapt the existing architecture targeted towards image classification to directly learn features for efficient image retrieval. We extend the Weighted Approximate Rank Pairwise(WARP)...
A new Error Correcting Code (ECC) solution aiming to improve the reliability of NAND flash memory (NAND) is proposed. Implemented in Solid-State Drive (SSD) controller IC (Fabricated in TSMC65LP), it is confirmed that more than 1/10000 lower error rate without increasing redundant bits (parity) of conventional BCH code, and 1.7x longer endurance of SSD can be achieved. This solution consists of two...
This paper presents intelligent solid-state drives (SSDs), which decrease memory errors by 95% and reduce power consumption by 43%. Figure 11.4.1 shows the measured memory cell error in the data retention and program disturb of 4X, 3X and 2Xnm NAND flash memories. As the memory size decreases, both data retention and program disturb errors increase due to the interference, random telegraph noise and...
A good benchmark suite should provide users with inputs that have multiple levels of fidelity for different use cases such as running on real machines, register level simulations, or gate-level simulations. Although input reduction has been explored in the past, there is a lack of understanding how to systematically scale input sets for a benchmark suite. This paper presents a framework that takes...
This paper presents a reconfigurable data protection controller (DPC) so as to eliminate the security threats against network-on-chip (NoC) system. The proposed DPC can terminate the illegal accesses to the shared-memory of NoC system before the links to target location have been established, thus greatly save link resource and energy. Moreover, according to the implementation results based on SMIC...
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