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A large number of surveillance applications requires narrow channel transmission and limited capacity storage, since very low bit-rate techniques becomes necessary. For many surveillance applications, motive objects contain most interest information. This paper proposed an enhanced motion block detector, which includes a pre-stage for adaptively classifying macroblocks into motive and static blocks...
Large amounts of data have to be processed, transmitted and storage by modern video surveillance applications. Thus, low bit-rate video compressed algorithm is very critical. For indoor surveillance application, only motive object is the most interesting and significant part. This paper proposed a motion detection based motion estimation algorithm to achieve low bit-rate and low complexity for surveillance...
One Super Hi-Vision (SHV) 4k times 4k @60 fps fractional motion estimation (FME) engine is proposed in our paper. Firstly, two complexity reduction schemes are proposed in the algorithm level. By analyzing the integer motion cost, 48% clock cycle is saved based on our mode pre-filtering scheme. By further check the motion cost of neighboring search points, our directional one-pass scheme can achieve...
In this paper, we contribute one reconfigurable integer motion estimation (IME) architectures (namely RPPSAD) based on adaptive algorithm. Firstly, based on the pixel difference analysis, the spatial redundancy is further exploited and three subsampling patterns are selected adaptively for the IME process. Secondly, in order to achieve data reuse and power reduction in memory part, the reference pixels...
In this paper, we contribute a configurable SAD tree architecture based on adaptive subsampling scheme. Firstly, by further exploiting the spatial feature, the integer motion estimation process is greatly sped up. Secondly, the conventional partial sum of absolute difference (SAD) based pipeline structure is optimized into configurable SAD oriented way, which enhances the performance and solve the...
The latest H.264/AVC standard can provide us superior coding performance. However, the new technique also brings about complexity problem, especially in motion estimation (ME) part. In hardware, the pipeline stage division of H.264 based ME engine degrades many software oriented complexity reduction schemes. In our paper, we propose one VLSI friendly fast ME algorithm. Firstly, pixel difference based...
In H.264/AVC standard, the improvement of motion estimation (ME) part helps to enhance the performance greatly. However, the ME part, especially the integer motion estimation (IME) occupies computation complexity dramatically, which leads to complexity in hardware implementation. Many works have been done to achieve efficient IME engine and propagate partial SAD (PPSAD) architecture is the most efficient...
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