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This paper presents a UHF-band RFID transmitter with a robust spur reduction technique using a DLL-based SSCG. By adopting an 8-bit DLL and Hershey-kiss modulated profile together, the SSCG shows more than a 20dB EMI reduction while providing up-, down-, and center-spread modes. Implemented in a 0.18μm CMOS process, the proposed transmitter achieves < −80dBc spur suppression with 25dBm transmit...
In TV tuner systems, the RF front-end design has been a challenging issue since it must simultaneously satisfy over 65dB of harmonic rejection (HR), and have high linearity for high-power input and low noise over wide bandwidth (48-to-870MHz). In terms of harmonic rejection, even though the state-of-the-art work reports over 60dB rejections on the 3rd- and 5th- order harmonics with a single mixer...
In this paper, an accurate, low power CMOS temperature sensor for attachable medical devices (AMDs) is presented. The proposed temperature sensor consists of a high-slope proportional to absolute temperature (PTAT) current and reference voltage generator, a current controlled relaxation oscillator (ICRO), a digital counter, and a reference clock generator. By adopting a temperature conversion linearity...
A high-speed and low-power adaptable period SAR-based DAC gain calibration is presented for DSM quantization noise suppression, which completes within 10μs while dissipating 0.2mW. The proposed calibration scheme is applied to the fractional-N type frequency synthesizer which adopts an 8-bit noise-cancelling DAC. The frequency synthesizer has a range of 48 to 900 MHz, consumes 11mA from 1.2-V supply...
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