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As transistor feature size scales down, re-convergence takes more and more significant effect to SER (soft error rate) estimation in combinational logic. In this paper, we propose 4 forms of re-convergence in 2-input logic gates, ROR, RSUB, RAND and RXOR, and for each form the sensitization condition is presented. The results are extended to more complex gates. Based on our re-convergence analysis...
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