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In this paper, we propose an automated technique to identify the reasons for un-testable faults and, an interactive Low Coverage Analysis flow to expedite the coverage analysis step, in scan ATPG. We seamlessly use an implication graph to keep track of the reasons that are responsible for each conflict encountered during ATPG. As ATPG progresses, for each fault, all the reasons arising from ATPG constraints...
In this paper, we propose a new search technique for ATPG, called CONCAT [1], which (a) is based on AND/OR reasoning, (b) integrates conflict driven learning, and (c) avoids over specification of test vectors. The technique works seamlessly (i) between Boolean and non-Boolean gates in industrial designs, (ii) across phases in latch-based designs, (iii) between justification and propagation tasks in...
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