The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Numerical simulations have been made of the turn-off of two-dimensional power bipolar transistor structures, under inductive loading, by alternate solution of the fundamental device equations and the circuit equations at each time step. The results have shown that current spreading reduces the magnitude of the electric field in the collector produced by the space charge of mobile electrons, so leading...
A processing scheme for the manufacturing of an open stencil mask has been set up by application of silicon technology and only one single X-ray lithography step for pattern generation. The mask fabrication is fully adapted to the demands of an ion projection lithography equipment by IMS. It has been proved that this mask technology permits solid structures of a complex geometry with high pattern...
The thermal redistribution of fluorine from 111 keV BF2+ molecular ion implants in (100) Si and 56 nm thick thermally grown SiO2 films on Si substrates has been studied using the Nuclear Resonance Broadening (NRB) technique. Vacuum annealing at temperatures up to at least 700??C lead to no loss or redistribution of fluorine from either the pure Si or oxidised Si samples. Fluorine diffusion took place...
Silicon avalanche photodiodes, designed to operate at bias higher than the breakdown voltage, have been fabricated in a p epitaxial layer over a p++ substrate. The device structure was designed to obtain ultrafast detection of single optical photons, as required in applications such as optical fiber testing, laser ranging, etc. Experiments demonstrate a time resolution having 45 picoseconds full-width...
The effect of RTA time on the emitter profiles and base current of polysilicon emitter bipolar transistors has been studied. Experimental results show increasing base current with anneal time. The contact saturation current density Jos has been extracted for a device with polysilicon doping level of 3??1020 cm??3 and a 45 second 1100??C RTA.
Electro-optical characteristics evolution of InGaAsP/InP lasers after 12000 hrs life tests with respect to their technological - crystallographic critical points is analyzed. In particular it was found the Indium die-attach is more reliale than is thought; in addition, through dynamic thermal resistance measurements, it is possible to screen out badly soldered devices. Gold diffusion was a degradation...
Enhancement of Schottky barrier height on n-type GaInAs has been achieved using Be implantation at low energies. These diodes have been used as Schottky-gates for the fabrication of n-channel MESFETs on GaInAs.
The techniques used in characterizing the GaAs based lasers and LED's are described and failure analysis results are reported for devices coming from incoming inspection, qualification, equipment production and field application. A detailed classification of failure modes and the correlation with failure mechanisms is shown by dividing among external overstresses, package and die-related problems.
Bipolar transistors can be implemented in a CMOS technology without excessive expense using the n-channel source/drain implantation simultaneously for the formation of the bipolar emitter. During MOS scaling the change of the drain structures from phosphorus to DID and LDD influences the individual bipolar device parameters. However this BICMOS concept can be extended to sub-??m CMOS without loosing...
An optimum TiSi2 thickness of 55nM has been established for contacting 110nM P+ layers. The P+ layer sheet resistance is reduced to less than 3 ohms per square without compromising the reverse leakage currents of the junctions. The reduction in Gummel number for the P+ layer has reduced the emitter efficiency of the junctions and yielded a factor of four increase in latch-up resistance.
The results of constant voltage stress and constant injection current techniques are discussed concerning dielectric lifetimes and failure modes of a thermal oxide layer and a ONO-layer. The constant voltage stress shows that the ONO-layer has a prolonged lifetime and a lower amount of early failures compared to a single oxide layer, even though the charge to breakdown of the ONO-layer is smaller...
The dielectric-silicon interface stress resistance of conventional furnace oxides and those formed using rapid thermal oxidation (RTO) with and without rapid thermal nitridation (RTN) are compared. The stress resistance is deduced from the change in the fast interface trap density and flatband voltage under high field constant current stress conditions. In the thinner dielectrics (10-13 nm), the interfacial...
Among the sensors able to be integrated with VLSI technologies, the gated micromagnetodiode is one of the most attractive magnetic sensors due to its simple design, small size and good sensitivity. Micromagnetodiodes have been fabricated on Silicon-On-Insulator technology. Experimental results concerning magnetic sensitivity, current-voltage characteristics and transconductance are compared to simple...
The concentration profile of defect centres in silicon induced by ??-particle irradiation, is investigated using deep level transient spectroscopy and spreading resistance measurements. As in the case of proton irradiation, a buried recombination centre doped layer is created in the penetration depth of the particles. In contrast to proton irradiations, after annealing of ?? particle irradiated samples...
CMOS compatible Junction-Field-Effect-Transistors (JFETs) for very low noise applications with different transistor layouts have been developed and tested. The l/f-corner frequency is below 1 kHz. An equivalent noise voltage density of 1 nV/HZ at 100 kHz was achieved. The transistors were applied as discrete elements in the inputstage of a transimpedance amplifier for plumbicon tubes. A total signal...
The SWAMI electrial properties have been studied focusing over the subthreshold voltage, Junction leakage and latch-up phenomena. The data below reported have been compared with the equivalent LOCOS processed structures.
This work studies the preannealing steps at high (HI) and low (LO) temperatures for internal gettering in medium oxygen-content silicon slices [(7??1.5). 1017 oxygen atoms/cm3]. By using silicon p-n junctions as test vehicles, we get the following conclusions: 1) LO-HI pretreatments produce an increase of defects with respect to non-preannealed wafers; such an increase is not observed in HI-LO pretreatments;...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.