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In order to reduce mismatch error of a DAC used in a multibit delta-sigma some dynamic element matching (DEM) algorithms have been proposed before, from which data-weighted-averaging (DWA) method is more hardware efficient and widely used. Unfortunately, DWA technique loses its functionalities for periodic signals which cannot be practically avoided. Many improvements have been suggested to minimize...
How to define an integral type mixed potential for a transmission line circuit with one-port elements at the line ends was exhibited to derive Brayton - Moser's equations of the transmission line circuits. Moreover complete stability (global asymptotic stability) conditions of the transmission line circuits were established by using the integral type mixed potential and Brayton - Moser's equations...
This paper presents a sigma-delta domain bandpass digital filter built by using single-electron tunneling (SET) devices. The filter is a spatiotemporally discretized and binary quantized model of analog distributed parameter filters. The discretized and quantized model naturally has local connection structure and fault tolerance of transient device errors. Thus the filter architecture is suitable...
This paper presents a full custom design of an energy-efficient and high-performance add-compare-select (ACS) unit. The ACS circuit is a main building block in a state-parallel architecture based Viterbi decoder implementation. The proposed ACS circuit is implemented in 90 nm CMOS using static logic. A standard ACS circuit is also implemented for comparison purposes. The proposed ACS circuit provides...
This paper provides the analytical background for the tunability in low noise amplifiers achieved by employing a pi-network where the series matching capacitor is assumed to be variable. The theoretical outcomes suggest that the choice of the tunable capacitor value will eventually result in a tradeoff between the noise figure (NF) and the input return ratio (S11). By pursuing a minimized noise figure...
This paper addresses the analog integrated circuit design automation by proposing an innovative circuit-level optimization kernel. The proposed approach, first, models analog design knowledge using soft computing techniques, than, enhances a stochastic optimization kernel by embedding the design knowledge model. The proposed approach uses common IC design environments and is validated for well known...
This paper analyzes Monte Carlo simulation procedures to estimate the impact of process intradie variations on the delay variability of digital circuits. The traditional approach based on the separate evaluation of intradie and interdie variations is shown to be incorrect. Indeed, Monte Carlo simulations on a 65-nm CMOS technology show that this approach can lead to underestimation by up to 35% in...
In this paper, a new method for routing is presented that computes routes as piecewise connected polygons. First, it creates routes based on a modified Lee approach that prefers 45-degree connections. Second, the resulting routes are developed to shortest piecewise linear segments of any angle between pins and around corners of blocked areas. The underlying algorithm for this second step can be interpreted...
Deep submicron CMOS processes have been long known to show radiation hardness properties, which make them an ideal choice for the development of integrated circuits for radiation and high-energy physics experiments. This property can be further exploited by means of the use of special layout styles such as the gate enclosed transistors. In this work Green functions have been used to solve the Poisson...
In this paper a new methodology is proposed for automated generation of EMC-aware behavioral models. Tightening EMC regulations require elaborate testing and simulation of EMC susceptibility of analog circuits during the design stage. A classification strategy detects EMC-sensitive devices which allows us to incorporate a more elaborate device model when accuracy is needed due to rectification effects...
A power-series based model for direct-conversion quadrature modulators with sinusoidal inputs is given in this paper. Starting from a linear approximation of different real-life non-idealities the proposed model has been further developed with inclusion of the second and third order power-series coefficients. Grouping of the resulting sinusoid terms as per output tone has been used to exclude model...
This paper poses a time varying magnetic field problem in cylindrical coordinate with different permeabilities for each region. The problem is solved using the finite element and finite difference methods for the linear case. The results of the finite difference method show low magnetic vector potential as well as the magnetic flux density when compared to the finite element. This paper investigates...
A new approach to automatic control of excitation parameters for the switched reluctance motor (SRM) is presented. A turn-on and turn-off angles play important roles in developing electromagnetic torque in SRM. The value of excitation angles are usually variable and depend upon the motor speed and other parameters of the inverter that excites the SRM. As the motor speed increases the shape of the...
Stream processor, Inc. (SPI) has introduced the Storm-1 stream processing system-on-a-chip (SoC) which contains 16 data-parallel processing arrays with five very long instruction word (VLIW) arithmetic logic units (ALUs) in each lane (altogether 80 processing units). In the paper the implementation of emulated-digital cellular neural networks universal machine (CNN-UM) simulation kernel on the Storm-1...
Resonant clocking techniques have been shown to achieve significant power reduction compared to square wave clocking. In this paper, we propose a dual-edge triggered Differential Conditional Capturing Energy Recovery (DE-DCCER) flip-flop that allows the clock frequency to be reduced by a factor of two. The proposed flip-flop was tested using STMicroelectronics 90 nm process technology. Simulation...
Reduction of Time to Digital Converter (TDC) quantization related phase noise is one of the most important challenges in all digital frequency synthesizer design. In this paper, a new structure is proposed to shape the quantization noise of flash TDCs. To verify effectiveness of the proposed general noise shaping technique, it is employed on a single delay chain flash TDC. To compensate the process...
This paper presents a fault and defect tolerance technique based on Ising spin-grass (ISG) for nanoelectronic logic circuits. An equivalent fault and defect-tolerant circuit of a logic circuit is constructed by cascading an input transformation circuit, a redundant circuit, and an ISG which corrects errors caused in the redundant circuit. We built combinatorial and sequential circuits of this structure...
A new more reliable design of micromechanical radial contour mode disk resonator have been demonstrated with the ability to work at UHF range and high quality factor in both vacuum and air and spurious modes free. In addition, this structure is capable to work at higher modes (e.g. second mode) without increasing the insertion loss and therefore lowering Q. These characteristics are achieved because...
Watermarking is the process that embeds data called a watermark, a tag, or a label into a multimedia object, such as images, video, or text, for their copyright protection. According to human perception, the digital watermarks can either be visible or invisible. A visible watermark is a secondary translucent image overlaid into the primary image and appears visible to a viewer on a careful inspection...
The solutions of partial differential equations (PDEs) play a key role in today's real world simulations. Computational Fluid Dynamics (CFD) is an important part of this area, which involves the problem of gas or fluid flow over different obstacles, e.g., air flow around vehicles, buildings, or the flow of water in the oceans. In engineering applications the temporal evolution of non-ideal, compressible...
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