This paper presents a fault and defect tolerance technique based on Ising spin-grass (ISG) for nanoelectronic logic circuits. An equivalent fault and defect-tolerant circuit of a logic circuit is constructed by cascading an input transformation circuit, a redundant circuit, and an ISG which corrects errors caused in the redundant circuit. We built combinatorial and sequential circuits of this structure and evaluated the error correction performance of their internal ISGs. The ISG exhibits high performance on correcting both permanent defect and transient errors in combinatorial circuits. The ISG has error correction capability also in sequential circuits when the rate of errors in the ISG itself is low.