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Dual-channel 0.5 A high-side intelligent power distribution switch with overcurrent and overtemperature circuit protection and soft start feature is proposed in this paper. The switch is dedicated to use in portable USB devices. Besides that, another motivation was to use the switch as a mixed-signal test vehicle to evaluate feasibility of current sensors for on-chip current testing. Parameters and...
The PSpice functions used for measuring the power, average and root mean square are not accurate enough because of using specific techniques like products or filters. We created fast and precise specialised behavioural blocks that obtain the power, average and root mean square values of the signals by applying an integral relation. The computation is done after the transitory regime is finished and...
This paper presents a design approach based on the splitting of the power transistor for smart power applications. The design approach is applied to realize a high side power switch with a configurable output in smart power technology. Experimental results are also presented and discussed.
This paper describes the analysis of influence of yield loss model parameters on the test patterns generation. The probability of shorts between conducting paths as well as the estimations of yield loss are presented on the example gates from industrial standard cell library in 0.8 mum CMOS technology.
In this paper, we describe the parameters identification results of PTAT (proportional to absolute temperature) temperature sensors that are implemented in the test chip and dedicated to CMOS integrated circuits. Theirs principles of operation are based on the vertical PNP structure. These sensing elements are uniformly distributed on the chip surface. The chip is dedicated to analyses and verifications...
Effective evaluation of capacitances of interconnections is indispensable for verification and simulation procedures in IC's design process. In our previous works we have proposed improved analytical formulas taking into account interactions between subregions of the structure. In this paper an analysis of accuracy of the procedure of conducting lines capacitance evaluation in the case of buses crossing...
The method of design of compositional microprogram control unit with codes sharing and collections of microoperations is proposed. The proposed method is based on application of special address transformer to form an address of microinstruction on the base of its representation as pair <code of operational linear chain, code of component>. The control algorithm is described using flow-chart...
Recent design techniques reducing leakage currents at all levels of abstraction are presented. Leakage reduction techniques can be divided by their applicability and the abstraction level into 3 main classes [1]: improved devices, trade off techniques, and leakage management. This work will detail on each of these classes.
This paper addresses the power reduction issues in nano CMOS circuits, and focuses on the static-power and power-efficient circuit synthesis. It shows that the circuit synthesis approaches applied in today's commercial EDA-tools are not power-efficient in most cases, and experimentally demonstrates a high power-reduction potential of an adequate circuit synthesis. It also shows that our novel information-driven...
This paper presents a low latency, one bit input, high-speed FIR-filter designed for multi-Gb/s mixed signal decision feedback equalizers. The filter utilizes a carry-save FIR tap structure and an efficient dual-edge-flip-flop-multiplexer. The filter has been implemented in a standard 0.13 μm CMOS technology. Simulation results from extracted layout shows correct functionality up to 3.4 G words/s...
The paper concerns the problem of system level design i.e. generation of high quality abstract models of modern electronic embedded systems for simulation, verification and technology mapping. The work focuses on methodology and AI techniques that can be incorporated to CAD tools. The main effort has been done on formulation of the algorithm and inference engine that controls the process of SoC modeling...
The method of optimization of the hardware amount in addressing circuit of compositional microprogram control unit is proposed. Method is based on expansion of the microinstruction format by the field with code of the class of pseudoequivalent operational linear chains. Minimization is reached due to decrease of the number of terms in system of Boolean functions describing the addressing circuit....
Superconducting (SC) resonant cavities seems to be an attractive option for various linear accelerators under construction. The nine-cell 1.3 GHz cavities have demonstrated gradients up to 38 MV/m. They are susceptible to small changes of dimension caused by mechanical vibrations, cooling systems, human activity (microphonics) and high gradients of RF field (Lorentz forces) as well. FPGA-based control...
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