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In recent years high-level synthesis (HLS) has seen considerable attention as it promises to increase designer productivity and make custom hardware implementation accessible to software developers. A challenge facing those developing HLS technologies is how to allow users to understand, debug and optimize their final hardware systems. Recently, several techniques have been developed to provide in-system...
ICT energy efficiency is a growing concern. Large effort has already been spent making hardware energy aware and improving hardware energy efficiency. Although effort is devoted to specific software areas like embedded/mobile systems, much remains to be done at software level, especially for applications deployed in the Cloud. In order to help Cloud application developers to learn to reason about...
The rounding modes of floating point arithmetic are usually simplified in implementations of alternative number systems, including the Logarithmic Number System (LNS), to a single round-to-nearest mode requiring internal guard bits that are exponentially expensive to provide. Noting that rounding takes significant time and hardware, this paper describes two innovations that enhance LNS performance,...
The complexity of hardware systems is currently growing faster than the productivity of system designers and programmers. This phenomenon is called Design Productivity Gap and results in inflating design costs. In this paper, the notion of Design Productivity is precisely defined, as well as a metric to assess the Design Productivity of a High-Level Synthesis (HLS) method versus a manual hardware...
The Program Vulnerability Factor (PVF) has been proposed as a metric to understand the impact of hardware faults on software. The PVF is calculated by identifying the program bits required for architecturally correct execution (ACE bits). PVF, however, is conservative as it assumes that all erroneous executions are a major concern, not just those that result in silent data corruptions, and it also...
Current cloud users pay for statically configured VM sizes irrespective of usage. It is more favorable for users to consume (and be billed for) just the right amount of resources necessary to satisfy the performance requirement of their applications. We take a novel perspective to enable such resource usage, where we assume that the cloud operator exposes a small, dynamic fraction of its infrastructure,...
Embedded system design is subject to many constraints with strong influence on design objectives and architectures. Designers of embedded systems need to consider the desired functionality together with cost constraints, and also with other quality metrics. The paper presents a simplified model for early estimation of system quality based on metrics such as hardware costs and operation speed. The...
LDPC was first proposed in 1962, after that considerable achievements have been made both in decoding algorithms and also in the structure of the decoder. In terms of decoding algorithm, from belief propagation (BP) to min-sum (MS), then normalized MS (NMS) and finally to a more performance oriented variable MS (VMS) algorithm. In terms of the decoder structure, there are mainly two, flooding and...
This work reports on a hardware implementation of a No-Reference technique for video quality assessment. The video quality evaluation metric and the way it is implemented in an optimal way using the VHDL language are described. Simulation results shows good accuracy concerning the extraction of both spatial and temporal features, creating a reliable basis for future real-time video quality evaluation.
The paper addresses the design of Distributed Control Architectures (DCAs) for the control of complex turbomachinery systems such as gas and steam turbines for Oil&Gas and Avionics. While the use of DCAs is a strong reality in the automotive industry, in the Oil&Gas application fields DCAs are not yet widely used and a centralized control system is often adopted. This work presents a high-level...
In this paper, a novel hardware scheme of trellis shaping (TS) for PAPR reduction of OFDM signals is presented. A practical implementation of TS is challenging, and thus we demonstrate a possibility of its hardware implementation using FPGA. In particular, we focus on its hardware resource consumption and develop an approach to efficiently implement its functionality. The experimental results show...
As power becomes one of the most important re-sources to provision while building modern HPC systems and applications, it becomes crucial to obtain deeper insights into applications' power and thermal characteristics. There exists aneed to correlate application context with processor-level andsystem-level power and thermal measurements. Existing profilingtools to monitor power and thermal measurements...
Restricted Boltzmann Machines and Deep Belief Networks have been successfully used in probabilistic generative model applications such as image occlusion removal, pattern completion and motion synthesis. Generative inference in such algorithms can be performed very efficiently on hardware using a Markov Chain Monte Carlo procedure called Gibbs sampling, where stochastic samples are drawn from noisy...
Over the past decade, platforms at Los AlamosNational Laboratory (LANL) have experienced large increases in complexity and scale to reach computational targets. The changes to the compute platforms have presented new challenges to the production monitoring systems in which they must not only cope with larger volumes of monitoring data, but also must provide new capabilities for the management, distribution,...
Linear layers are crucial building blocks in the design of lightweight block ciphers, since they perform the dual task of providing the much needed diffusion, while also ensuring minimal hardware cost for implementation. Although a number of lightweight block ciphers with parsimoniously designed linear layers have been proposed in cryptographic literature, there is limited work on generic construction...
Plagiarism seriously damages the education process in a number of ways, where it prevents students from developing the skills of creative thinking and critical analysis and it undermines the trust between lecturers and students. Furthermore, if plagiarism is undetected, it can impact the reputation of the academic institution and devalue its degrees. In this paper, we present two techniques for plagiarism...
Existing hardware design methodologies provide limited methods to detect security flaws or derive a measure on how well a mitigation technique protects the system. Information flow analysis provides a powerful method to test and verify a design against security properties that are typically expressed using the notion of noninterference. While this is useful in many scenarios, it does have drawbacks...
Signal selection is the pre-silicon evaluation step which maximizes overall reconstruction rate of state elements. Due to its high complexity, recent efforts on signal selection has focused on sequential nodes in the circuit under debug. In this paper we propose a combinational signal selection algorithm which possibly selects combinational nodes of the circuit to maximize state restoration capability...
In order to address the throughput constraints of the system at minimal power consumption, the workload of computing nodes should be balanced. This requires accounting for the underlying hardware characteristics and throughput sustainable by these nodes. This work provides a workload distribution and balancing methodology of a divisible load under a throughput constraint, on heterogeneous nodes. The...
In order to deal with performance of software systems, it is important to introduce approaches and tools that work in the early phases of the software life-cycle, even before the code is developed. In fact, if performance requirement violations are discovered too late, then there may be significant impacts on project costs. Some work has been done in the last few years to tackle the problem of automatically...
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