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The model of behavior of the fixed, mobile charge, charge on superficial states, and traps in MIS structures with a non-uniform blocking surface of the semiconductor is offered.
The method of mechanical and electrical interconnection of functionality devices placed on the surfaces of different solid state materials by elastic strained films is described. Main advantages of the new method, in compare with the classical indium bump technique is shown.
Interfacial characterization of ultra low-k film with the layer underneath is very important for reliable manufacturing of ultra low-k film. In this study, we proposed a new application of TOF-SIMS to predict the interfacial behavior of the ultra low-k with the layer underneath. Strong correlation between carbon intensity at the bottom interface with the adhesion energy of the ultra low-k with the...
The formation of Cu2SnZnSe4 thin films in the selenization of different sequential metallic and alloy films is investigated. It is shown that the main process of low temperature selenization (up to 300degC) is the formation of different binary copper selenides on the layer surface. High temperature selenization (over 400degC) leads to the formation of Cu2ZnSnSe4 phase with some excess of a separate...
Wafer fusion is a powerful technique in integrating heterogeneous materials. The most well known example is silicon-on-insulator (SOI), and the more recent success is the hybrid silicon laser. Most often the fused interface is incorporated in a device structure where its electronic properties are not crucial to the device performance, considering this interface is normally more defective than epitaxial...
Polarities of plasma charging damage in n- and p-channel MOSFETs with Hf-based high-k gate stack (HfAlOx/SiO2) were studied for two different plasma sources (Ar-and Cl-based gas mixtures), and found to depend on plasma conditions, in contrast to those with conventional SiO2. For Ar-plasma, which was confirmed to induce a larger charging damage, both n- and p-ch MOSFETs with high-k gate stacks suffer...
This paper presents an innovative structure based on 3 dimensional integration technology, where ultra thin inter layer dielectric enables a dynamic threshold voltage (VTH) control. A sequential process flow is proposed to fabricate 3D devices with dynamically tunable VTH. This ability can be exploited to design SRAMs cells with increased stability and surface density compared to planar technology...
The power consumption and the matching will be the principal issues at the 32 nm node and below. In this context, Ultra-Thin Body devices are extensively studied for the end-of-roadmap CMOS. In this paper we present the SON technology, leading to the simple fabrication of sustained mono-Si nano-membranes over an empty tunnel, and discuss on the application of this process to build-up electronic devices...
Reliabilities of high-k stacked gate dielectrics are discussed from the viewpoint of the impact of initial traps in high-k layer. TDDB reliability can be explained by the generated subordinate carrier injection (GSCI) model. While initial traps increase the leakage current, they do not degrade the TDDB reliability. In contrast, the BTI reliability is strongly degraded by initial traps.
Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
Novel 3D stacked gate-all-around multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32 nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low IOFF (< 20 pA/mum) and high ION (> 2.2 mA/mum) were demonstrated. Moreover, those transistors do not suffer...
Advances in micromachining technology can facilitate the integration of SAW (Surface Acoustic Wave) devices and CMOS circuitry on IC scale substrate for Monolithic fabrication. The optimal design and performance of these filters can be reached by using new Smart materials. The key component in the structure of the SAW device is the piezoelectric materials used which depends mainly on some important...
Plasma-exposed Si surface related to Si recess in source/drain region was investigated in detail for various superposed bias configurations with frequencies of 13.56 MHz and 400 kHz. Two different bias powers were utilized by an inductively coupled plasma reactor (ICP). The surface layer (SL) and the interfacial layer between the SL and Si substrate (IL) were analyzed by spectroscopic ellipsometry...
The idea to synthesize diamond/beta-SiC nanocomposite films is to obtain films that posses a whole range of combined properties of diamond and SiC based on the application specifications. The nanocomposite film system is supposed to serve tribological, thermal barrier and electronics applications. In this paper, a brief review of the film system with regards to its synthesis, characterization and...
The materials surface plays an extremely important role in the response of the biological environment to the artificial medical devices. The initial protein interactions with implant surfaces are very important and therefore, it is clear that if the surface morphology, structure, composition, and properties are changed, cell functions are influenced. Nanoscale materials are thought to interact with...
This study presents diamond film growth, preparation, and characterization using microwave plasma-assisted chemical vapor deposition for gyrotron window materials intended for fusion plasma ignition in magnetic and inertial confinement fusion such as ITER. A surface polishing technique is utilized to polish the films to a mirror grade surface finish. A fine-grained film surface morphology is realized...
Diamond-like carbon (DLC) films are deposited on AISI 304 stainless steel substrates using hollow cathode chemical vapor deposition (CVD). The substrate bias voltage is varied from 0 to -200 V to investigate its effect on the structural and mechanical properties of the films. Raman spectra show the formation of the G (graphite) peak and D (disorder) peak in the films. X-ray photoelectron spectroscopy...
We have demonstrated very high-k (k~50) HfO2 films for ultra-scaled CMOS application. Higher symmetric crystalline structure enables us to achieve higher-k HfO2. We present a feasible method to obtain sub-nm EOT with very high-k HfO2 under actual process conditions, together with an underlying mechanism.
Efficient full-spectrum white polymer light- emitting diodes (WPLEDs) were fabricated using single- layer luminescent polymer produced by one-step plasma polymerization from naphthalene (PEN) (and carbazole (PENCB)) derivatives. WPLEDs based on the plasma polymers had demonstrated efficient pure white light electroluminescence that covers the full visible spectral range with excellent color stability...
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