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The widespread deployment of high-data-rate wireless connectivity was enabled by the adoption of the WiGig (802.11ad) standard, consequently placing a challenge on integrated Power Amplifiers (PAs). To comply with system requirements, the PA must cover bands from 57 to 66GHz and deliver up to 10dBm RF modulated power, while OFDM modulations up to 16 or 64QAM are supported, implying a large Peak-to-Average...
Spectrum-efficient modulations in modern wireless systems often result in large peak-to-average power ratios (PAPRs) for the transmitted signals. Therefore, PA efficiency at deep power back-off (PBO) levels (e.g., −12dB) becomes critical to extend the mobile's battery life. Classic techniques, i.e., outphasing, envelope tracking, and Doherty PAs, offer marginal efficiency improvement at deep PBO in...
Wake-up receivers are considered as practical solutions to enable ultra-low-power (ULP) wireless sensor nodes (WSN) in a dense environment. A low data-rate (<∼50kb/s) wake-up receiver (WuRX) should facilitate a long sensor lifetime, optimal network latency and strong interférer resilience. Moreover, such sensor nodes should be ultra-low-cost compact objects. This paper presents a 2.4GHz WuRX with...
Integration of RF transceiver blocks along with the digital signal processing part in CMOS is becoming the trend in the semiconductor industry for lower cost and smaller form factor. Nowadays, the interest is even growing towards implementing the RF PA in CMOS technology. Cost reduction, diversifying means of fabrication and the addition of performance enhancement circuitry are the main reasons behind...
Technology scaling brings lower supply voltages. For advanced CMOS technology nodes of 40nm and beyond, this leads to specific challenges. In particular, analog circuits require specialized design approaches and innovative techniques. Maintaining high precision with reduced available signal swing while keeping energy consumption within reasonable bounds has presented challenges for many circuit designers...
Integrated transmitters for mobile applications face increasingly stringent specifications due to increasing modulation bandwidth and dynamic range for higher data-rates and reduced out-of-band emissions and noise for coexistence. Long battery life, low cost and small form factor require high efficiency and large integration levels.
The increasing complexity and cost pressure of advanced radios for mobile communication devices dictates further integration of front-end components into the transceiver (TRX) in order to reduce bill-of-material (BoM), printed-circuit-board (PCB) area and system cost. In [1] a fully-digital polar modulator is presented, which enables a SAW-less 2G/3G transmitter, in particular by solving the transmitter...
In this work, silicon dioxide layers are deposited by RF sputtering technique at low temperatures for micro electro mechanical systems (MEMS) and CMOS applications. Due to incompatibility of thermally grown oxide in CMOS and MEMS applications, sputtered oxides shown good alternative method for oxide depositions. The sputtered layers shown similar characteristics as thermal oxides. FTIR, AFM and SEM...
By 3D integration of an array of 12 nominally identical AlN MEMS sub-filters with a CMOS switching matrix and application of statistical element selection to the same system, we have built a self-healing filter offering 495 unique filter responses and a tuning range of 500 kHz for both center frequency and bandwidth. The demonstrated system enables correction of intrinsic, fabrication-induced variation...
Fully integrated single stage 1.8V power amplifier working at 2.4GHz is designed in TSMC 180nm CMOS RF process. In this paper, cascode topology with inductively degenerated common-source CMOS power amplifier is suggested with improved gain, isolation, better stability and sufficient linearity over the operating range. Though noise figure is not that much relevant for PA design, optimum matching network...
We present a compact, high-gain power amplifier (PA) that achieves high power and high output impedance through a 4-stacked architecture. By proper adjustment of device sizes and bias voltages, the optimum load impedance for maximum Psat is moved close to 50Ohm which eliminates the need for an output matching network. The single-stage PA exhibits a high gain of 16 dB which is more than twice the gain...
Proceedings of the 2015 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications. For proceedings on USB: IEEE Catalog Number CFP15PAR-USB, ISBN 978-1-4799-5506-0. For proceedings on CD: IEEE Catalog Number CFP15PAR-CDR, ISBN 978-1-4799-5505-3. Copyright and Reprint Permission: Abstracting is permitted with credit to the source. Libraries are permitted to photocopy beyond the...
A fully-integrated power amplifier (PA) designed with 8 stacked transistors is implemented in a 0.25/SPL mu/m Ultra-CMOS Silicon-on-Sapphire (SOS) technology. The stacked Cascode configuration allows the PA to deliver high gain and high output power while maintaining the PA stability. At 2.2 GHz, the PA under a bias supply of 16 V (2V per transistor) measures a saturated output power PSAT of 28.5...
A broadband fully-integrated class-A power amplifier (PA) is presented using derivative superposition (DS), which delivers +18 dBm of saturated output power from 1 GHz to 6 GHz. The PA exhibits a flat power gain of 13.5 /SPL plusmn/ 1.2 dB over its operating frequency range. It features a high linearity with an output 1dB compression point (OP1dB) and third order intercept point (OIP3) of more than...
An integrated reconfigurable tuner based on a 4-mm long coplanar waveguide transmission line (CPW) loaded periodically with switched capacitors is demonstrated in a standard 45nm CMOS Silicon on insulator (SOI) technology. The tuner is designed with 10 switchable capacitors controlled by a series-in parallel-out shift register, that allows on-the-fly programming, leading to a large Smith chart coverage...
Technology scaling, which has enabled operation at mmWave frequencies in CMOS, has also brought with it a steady decrease in the breakdown voltages of the transistors. The resulting fall in output power of power amplifiers (PAs) combined with the low efficiency due to poor device gain and lossy passive components has led to research efforts towards efficient yet linear high output PAs at mmWave. This...
An Radio Frequency (RF) Power Amplifier (PA) plays a key role in front end of RF Transmitter. It's role is to convert low power RF Signal into high Power signal so that it can drive the antenna of the transmitter. The PA exhibits certain desirable characteristics such as enormous output Power, reduced heat dissipation, nominal input and output return loss and eminent gain. It is necessary to cut down...
This paper presents a design of a low power single ended CMOS LNA for reconfigurable applications including GPS, GSM (DCS1800, PCS1900), 3G (UMTS), WLAN b/g and LTE. Based on a wideband input matching, the LNA stages cover all band of interest while achieving a good trade-off between high gain, low noise figure and low power consumption. For multi-standard aim, the LNA selects the desired bands using...
This work describes the design and implementation of an inductorless, low power, high conversion gain fully differential subharmonic down-conversion mixer for 2.4 GHz application. A complementary current-reuse technique is adapted between the transconductance stage and LO switching stage to boost the conversion gain without additional power consumption by reusing the DC current of the LO switching...
This paper presents a 1.9 GHz linear power amplifier (PA) architecture that improves its power efficiency in the power back-off (PBO) region. The combination of power transistor segmentation and digital gain compensation effectively enhances its power efficiency. A fast switching scheme is proposed, such that PA segments are switched on and off according to signal power, i.e. the proposed scheme makes...
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