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We report the design, fabrication and measurement of a dual-band polarization-independent terahertz reflectarray surface integrated on a silicon reflective substrate. The proposed device opens an important avenue for the integration of tunable elements in terahertz reflectarrays.
We present a fabrication method for thin-film polymer MEMS that achieves an order of magnitude improvement in feature size and resolution. Specifically, we modified the electron beam lithography (EBL) process for biocompatible poly(chloro-para-xylylene) (Parylene C), enabling flexible, encapsulated titanium structures with features as small as 100 nm. The mechanical, electrical and material properties...
In this study, a micro-probe electrode array with independent interconnections through the substrate has been developed using LRS(Low Resistance Silicon) via and glass reflow process. The silicon vias have electrical resistance less than 2 Ω because the boron ion in the borosilicate glass wafer can diffuse into the LRS pillars during glass reflow process. The LRS wafer was etched with double DRIE...
This paper presents a universal self-aligned in situ on-chip micro tensile fracture strength tester designed for tensile strength extraction and process evaluation, which will provide, for the first time as far as the authors know, great force(above 100mN) to in situ on-chip specimen without the introduction of precise instrument, especially suitable for bulk micromachining related tests. The whole...
We report a new fabrication technology to form capacitive sense/drive electrodes with large area and narrow, uniform, and controllable gaps around a three-dimensional (3D) micro shell resonator. The process utilizes electroplated photoresist (EP) to form a conformal sacrificial layer on the 3D shell and electroplated metal (EM) to grow drive/sense electrodes towards the resonator until they touch...
This work reports the patterning of high aspect aluminum doped zinc oxide (AZO) for nanowall hollows and capacitive resonators by deep reactive ion etching (deep RIE) and atomic layer deposition (ALD). Nanowall hollows with 50 nm in thickness and 15 μm in height as well as smooth surfaces have been achieved and the aspect ratio of their height-to-width is as high as 300. Suspended AZO capacitive resonators...
This paper reports an enhanced photocatalysis system for organic pollutants degradation, using high-aspect-ratio (HAR) Si/ITO/WO3 micropost photoelectrodes, fabricated by deep reactive ion etching (DRIE) and sputtering. Compared with traditional Titanium Dioxide (TiO2) photoelectrodes, Tungsten trioxide (WO3) coupled with Si can absorb visible light. Besides, an optimized HAR electrode configuration...
Thin (300 and 600 nm) epitaxial silicon layers were deposited on R-plane sapphire wafers by CVD technique using SiH4 and SiCl4 mixture gas diluted by hydrogen. Quality parameters of epitaxial silicon on sapphire (SOS) wafers were studied by means of XRD, AFM, UV scattering and surface PV methods. Resistivity profiles of layers were measured. Quality of SOS in dependence on initial growth (up to 80–100...
Through glass vias (TGVs) are a key component in glass-based interposers and microelectromechanical-system lid wafers. Magnetic-field-assisted self-assembly has been demonstrated earlier in fabrication of through silicon vias. Here we present an entirely maskless TGV fabrication process utilizing magnetic assembly. Femtosecond laser is used for ablative direct patterning of surface metal layers and...
The paper reports a novel approach to improve transfer resolution and transfer uniformity of electrostamping, based on thin-film edge electrode lithography (TEEL). TEEL transfers nanopatterns collectively corresponding to thin-film edge electrodes on a mold according to an electrochemical reaction in the water meniscus formed between the mold and the substrate. High relative humidity can ensure the...
We report a general method to fabricate miniaturized soft robots. For the first time, a freestanding microscale robotic finger/tentacle has been realized by heterogeneous integration of soft material polydimethylsiloxane (PDMS), liquid metal (LM), and silicon chips. Unlike the existing methods to make soft electronics or soft robotics, our technique of heterogeneous integration enables large-area...
Solution-processing has gained widespread attention over the past years due to their potential low-cost advantage in terms of fabrication of electronics as well as application to flexible electronics. Cyclopentasilane is used for the solution-based processing of silicon. As a liquid, the material has the potential to be applied directly on low-cost flexible substrates that generally have a low thermal...
This paper presents the effect of temperature to the etch rate of nitride and oxide layers in Buffered Oxide Etch (BOE) solution. Either nitride or oxide layer is commonly used in the semiconductor fabrication process as a mask for the next wet etching process. A well-defined frame structure and reduced etching time will increase the productivity of the fabrication process. The approach starts with...
This paper presents one fabrication process of a triple-layer stacked TSV interposer for switch matrix consisting of eight RF chips. There are about 600 TSVs in the interposer and the diameter of TSV is 40um with the aspect ratio being 4:1. The whole area of the interposer is 13.5 mm × 7.5mm and the thickness of the triple-layer stacked interposer is only about 0.7mm. After the process, the electrical...
In this paper, a differential vertical transition with through silicon vias (TSVs) in photonic integrated circuit die is presented. The vertical transition composes of TSVs providing connectivity between the die front side and back side, BEOLs and micro-bumps. No back side redistribution layer is required to keep the fabrication process simple with good electrical performance. The high frequency characteristic...
A 4H-SiC MOSFET with breakdown voltage higher than 1200V has been successfully designed and fabricated. Numerical simulations have been performed to optimize the parameters of DMOSFET. The n-type epilayer is 10 μm thick with a doping of 6×1015 cm−3. The devices were fabricated with a floating guard ring edge termination. The drain current Id = 10 A at Vg = 20 V, corresponding to Vd = 2.0 V.
A silicon reflection type 8-channel, 100-GHz channel spacing arrayed-waveguide grating using loopback mirrors is proposed and designed. The loopback mirror has a flat excess loss of 1.8 dB in C-band. The size of the arrayed-waveguide grating is 650 μm × 1400 μm.
Transdermal drug delivery is an important approach due to its advantages of controlled release, easy wiping off, high safety and low degree of side effects. However, the efficiency and success of the drug delivery method is seriously hampered by the incapacity of many drugs to cross the skin at therapeutically useful rates. A microneedle approach can dramatically promote transdermal delivery, especially...
We have experimentally demonstrated a compact polarization beam splitter based on the augmented-low-index-guiding structure in the silicon nitride/silicon-on-insulator platform. The device is only 4.8 microns long. The design of the device is robust and has a good fabrication tolerance.
We report on the fabrication of silicon nanostructures using a metal-assisted chemical etching process. These vertically standing structures (we call quantum walls) could feature absorption in the infrared regime beyond the band edge of bulk silicon for potential application in infrared sensors.
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