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In this paper, we report the potential of the doping-less (DL) double gate field effect transistor (DL-DGFET), for ultra low power (ULP) subthreshold logic applications. We demonstrated that the proposed DL-DGFET do not require any doping from source to drain region and it can perform significantly better than highly doped junctionless (JL) and abrupt S/D inversion-mode (IM) DGFETs. The DL-DGFET achieves...
3D technologies provide promising solutions to meet the needs of today's high performance and high speed ICs. Therefore, a methodology is required to model, predict, and optimize the 3D interconnect performance. This paper focuses on modeling of the performance of 3D interconnect test structures, realized on Si substrates, both in the time frequency domains. In particular, the impact of the Si substrate...
This paper presents the nonlinear effects of the analog self-interference (SI) canceller and a practical solution to suppress the nonlinear distortions in multiple-input multiple-output (MIMO) full-duplex wireless communication systems. Due to the inherent nonlinearities of the active radio frequency (RF) components used to tune the attenuations and the phase shifts in the analog SI cancellers, nonlinear...
This article investigates novel adaptive self-interference cancellation solutions and the total integrated cancellation performance of a mobile single-antenna inband full-duplex transceiver. First, novel self-adaptive digital self-interference cancellation algorithms are described, with an emphasis on tracking of time-varying self-interference coupling channel in a mobile device as well as on structural...
In this paper we present a way to calculate the fusion of multi-focus images based on the linear combination of a pair of images taken by a digital camera with different levels of focus. For the linear combination, a linear function with spatial coherence is optimized to maximize the sharpness of the merged image. By the complexity and dispersity of the linear system of equations arises, the solution...
TSV (Thru Silicon Via) application for 2.5D silicon interposers and 3D stacked devices is expected to realize a next-generation semiconductor device with high packaging density, power saving, and high-speed signal transmission, etc. Recently, discussions on long-term reliability of TSV has been triggered, the establishment of TSV integration technologies contribute to reliability is strongly requested...
This paper presents the influence of a doped Si region during the epi growth process on the performance of GaN on Si Power Amplifiers with significant improvement in GaN on Si performance achieved by reducing the doped Si region. Through load-pull and waveform measurements of a PCM GaN on Si device the impact of the doped region below the AlGaN buffer, termed the parasitic conduction layer, on PA...
The DARPA Microsystems Technology Office is developing revolutionary materials, devices, and integration techniques for meeting the RF integrated circuit performance requirements for advanced modern RF systems. DARPA is enabling these systems through systematic development of materials and devices, circuits, and integration technologies for compound semiconductors. The DARPA Nitride Electronic Next-Generation...
Two-way co-channel communication enabled by recent full-duplex (FD) transceiver designs offers the potential to double spectral efficiency. However, currently most of FD radios require additional antennas to facilitate the multi-stage self-interference cancellation (SIC). As increasing antenna number of transceiver certainly leads to higher theoretical link capacities, the real gain of FD systems...
Full-Duplex radio provides many benefits beyond improving spectral efficiency. However, canceling the self-interference completely is a big challenge behind Full-Duplex wireless. Although many intelligent efforts devote to active analog radio frequency self-interference cancellation (AARFSIC), the power of the residual self-interference (SI) after the AARFSIC is still much stronger than that of the...
New System-in-Package (SiP) with innovative Wafer-Level-System-Integration (WLSI) technologies that leverage foundry core competence on wafer processes have been demonstrated. The WLSI technologies include Chip-on-Wafer-on-Substrate (CoWoSTM) 3DIC and interposer, Integrated Fan-Out (InFO) and Chip-Scale Wafer-Level-Packaging. Wide application portfolio from very low I/O pin-count, low-cost devices,...
As CMOS electronics scale to smaller dimensions, wired interconnect density, power consumption, and delays have introduced bottlenecks in performance. Ultrasonic communication links integrated within the silicon substrate offer an opportunity to create low power high data rate channels. We have utilized ultrasonic phased arrays, micro-sonars, for reconfigurable communication links. Brand new vistas...
Radio test customers need the ability to support go/no-go testing, all levels of performance verification, as well as isolate and repair radios from the organization level (1st line) through intermediate level (2nd line) and into the depots (3rd line) to achieve and maintain system readiness using manual and automatic test. Each level of maintenance has unique objectives which dictates the packaging,...
A simulation based pre-silicon leakage estimation methodology for SRAM is proposed. The methodology is easily extended to different voltage and temperature corners and it enables determination of leakage yield. It comprehends the impact of die to die and within die variations. It is used to generate yield specific leakage multipliers to capture impact of variability on leakage. Comparative studies...
IBM first qualified a 0.35μm generation 1000 Ω-cm high resistivity substrate (HiRES) SiGe BiCMOS technology in 2011. This technology was optimized for WiFi and cellular NPN power amplifier (PA), NPN low noise amplifier (LNA), and isolated CMOS NFET switch rf front-end-IC (FEIC) integration. It includes an optional through silicon via used as a low inductance ground path for NPN emitters. Data for...
Flexible electronics have customarily addressed low-frequency applications because the traditional materials for flexible electronics, such as polymer and non-crystalline inorganic semiconductors, have poor electronic properties. Fast flexible electronics that operate at radio frequencies (RF), particularly at microwave frequencies, could lead to a number of novel RF applications that rigid chip based...
ZnO thin films are deposited by single step and a two-step method on Si (100) substrates by using RF sputtering. The comparisons are based on structural, surface morphology and topography of ZnO thin films. XRD pattern of the ZnO film derived by two-step method exhibited single crystalline wurtzite structure. AFM results revealed the crystallite size and roughness of the ZnO thin film.
With the increasing demand of wireless applications, current radio transceivers are challenged by the requirement of high data rate and high flexibility. Full-Duplex Dual-Band OFDM radio transceiver is a very promising radio technique to approach this goal. However, the mutual undesirable signal leakages due to the I/Q imbalance in the Full-Duplex Dual-Band RF front-end lead to a significant performance...
In this paper, the latest research results for design and characterization of an 85 GHz fully monolithic integrated schottky rectenna (rectifying antenna) using SiMMWIC (Silicon Monolithic Mm-Wave Integrated Circuits) technology are presented. Under RF excitation in frequency range of 75 ~ 90 GHz a sharp receiving profile at 85 GHz of the designed rectenna is clearly characterized. With different...
This paper reports the reactive i on etching (RIE) characteristics of partially-cured benzocyclobutene (BCB) in sulrur-hexafluoride/oxygen (S F6/O2) plasmas. The etching rate and etch anisotropy are mainly dependent on RF power, chamber pressure, and SF6 concentration. The processing parameters are investigated ranging from 50 to 200W, 22.5 to 270 mTorr, and 0% to 80%, respectively. According to the...
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