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Design of low frequency high pass filters using pseudo resistors is discussed in this paper. The pseudo resistor, which is biased in the sub-threshold region, is capable of achieving very large value resistance while keeping silicon area very small. Designs of first and second order high pass filters with cut off frequency of 0.01 Hz are presented. This work discusses the challenges faced while designing...
Having a robust and tamper proof structure, recently proposed pyhsical unclonable functions (PUF) are considered as a promising instrument that would be used for secure key generation and storage, integrated circuit (IC) authentication and generating chip-unique signatures. We describe a delay-based PUF architecture suitable for RFID devices mostly suffer from low computational power and tiny sillicon...
A common approach for converting sunlight to electricity at a low cost is either to achieve high conversion efficiencies and/or by using low-cost systems. High solar energy conversion efficiency by using photovoltaic devices has been achieved by concentrating sunlight on a multi-junction monolithically stacked solar cell. The process of manufacturing monolithically stacked solar cells is complex and...
In this paper, a study of the leakage current through strained p+ n Si1-xGex/Si hetero-junctions is presented. The reduction in the band gap, induced by stress forces, and the doping level at the hetero-interface, due to the use of halo implantations, are varied by changing the Ge content and the recess depth. A comparison between simulation results and experimental data is presented to analyze the...
We employed a 5.8 GHz microwave annealing (MWA) to electrically activate the doped hydrogenated amorphous silicon (a-Si:H) thin films on glass. As compared with traditional rapid thermal annealing (RTA), MWA can electrically activate better the doped a-Si films at low annealing temperature and short processing time and effectively reduce their resistivity. The longer annealing time for MWA is better.
Channel Hot Carrier (CHC) and Negative Bias Temperature Instability (NBTI) degradation has been studied in pMOSFETs with and without channel strain. The results show larger CHC degradation and a neglegible influence of NBTI on strained pMOS devices. The degradation effects are modeled to be introduced in a circuit simulator. The simulations of a CMOS inverter, which has been chosen as example circuit,...
We present a study of Ti implanted Si layers with doses in the 1013-1016 cm-2 range that have been subsequently Pulsed-Laser Melted (PLM) at 0.8 J/cm-2. Recently, we have associated a rectifying electrical behavior found between the Ti implanted Si layers and the underlying substrate to the Intermediate Band (IB) formation in the Ti implanted Si layers with the highest doses. We analyze by means of...
We present a structural characterization by means of Raman scattering measurements of Si layers implanted with very high doses of Ti+ ions. After implantation the layers were pulsed laser melted (PLM) to recover the lattice crystal and looking for the intermediate band (IB) formation. The Raman spectra permit us to evaluate the degree of crystallinity for the different implanted doses and detect the...
In order to fulfill the stringent requirements for ultra-shallow junction formation and proper defect removal needed for future Si devices, molecular and cold implants have arisen as new technological strategies for dopant incorporation. In this work we have used different atomistic simulation techniques within a multiscale scheme to study the phenomena governing the damage generation in these types...
It is well known the gate dielectric conduction behaviour in high-k based MIS structures is usually dominated by more than one transport mechanism. In this work, results of the electrical performance of MIS structures on n- and p-Si using Al2O3, HfO2, and nanolaminated 10 nm-thick layers as gate insulators are reported. Clearly, different conduction mechanisms were observed depending on the applied...
The emerging field of silicon photonics targets monolithic integration of optical components in the CMOS process, potentially enabling high bandwidth, high density interconnects with dramatically reduced cost and power dissipation. A broadband photonic switch is a key component of reconfigurable networks which retain data in the optical domain, thus bypassing the latency, bandwidth and power overheads...
The aim of this study is to optimize a low cost phosphorus diffusion process suitable for pn junction formation on extremely thin (<;100um) c-Si solar cells. The deposition of the doping layer has been carried out by spray coating of commercial and non-commercial precursors. There have been monitored sheet resistance, effective lifetime and oxygen content in the prepared emitters.
This paper investigates the various effects that affect the ID-VDS characteristics in a strained-Si over SiGe NMOSFETs. The modeling is done keeping the BSIM4 parameters as the reference. The model thus developed showed precise agreement with the experimental data. It is observed that mobility in strained silicon increases and thereby enhancing current. Bandgap is affected to a lesser extent, but...
Simulation data of the performance of amorphous silicon (a-Si:H) thin film solar cells using the software package Sentaurus TCAD (Synopsis Inc.) are presented. The Sentaurus software is configured with standard theoretical models describing e.g. the density of states in the mobility gap of a-Si:H, generation/recombination statistics, optical data of a-Si:H thin films etc. to calculate illuminated...
This paper describes a fabrication process to obtain high efficiency c-Si cells (>; 20%) based on the Laser Fired Contact Passivated Emitter Rear Cell (LFC-PERC) concept. Photovoltaic efficiencies beyond 20% have been achieved using thermal SiO2 as a rear passivation layer on 2 cm × 2 cm solar cells with 0.45 Qcm Fz c-Si substrates. Efficiencies up to 22% are expected for material resistivities...
Single cell labeling and tracking is an interesting field in cell biology. The growing development of small barcodes will allow studies at single cell behavior under optical microscopes. These codes have to fulfill special biological, optical and fabrication requirements. Nowadays, silicon microtechnologies advances allow fabricated structures at small dimension. In this paper, we show the design...
Ion implantation is a technique commonly used in the fabrication of semiconductor devices. The introduction of ions generates a large concentration of defects in the Si lattice. The presence of these defects can adversely affect the device performance. Conversely, in more recent years, ion induced defects have opened the possibility of new Si based optoelectronic devices. The areas which are currently...
This paper describes a versatile and reliable wafer-level hermetic packaging technology using an anodically-bondable low temperature cofired ceramic (LTCC) wafer, in which electrical feedthroughs and passive components can be embedded. The hermeticity of vacuum-sealed cavities was confirmed after 3000 cycles of heat shock (-40°C/+150°C, 30 min/30 min) by diaphragm method. The width of seal rings necessary...
A simple method is described to protect polycrystalline silicon (polysilicon) from electrochemical corrosion which often happens when the Micro-Electro-Mechanical systems (MEMS) device is released in HF-based solutions, especially when the device contains noble metal. We propose to employ a photoresist (PR) layer to cover the noble metal layer, which electrically contacts with the underlying polysilicon...
This study presents a novel design and fabrication process to realize a miniature polymer ball bearing slide table (slider) with long linear travel range. The linear slide table consists of a pair of V-shape silicon (111) crystal plane rails, and a suspended slider supported by four polymer ball bearings. The ball-housing on slider is also designed to confine the bearing. The slider, rails, and ball-housings...
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