The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Today many of the high performance embedded processors already contain multiple processor cores and we see heterogeneous manycore architectures being proposed. Therefore it is very desirable to have a fast way to explore various heterogeneous architectures through the use of an architectural design space exploration tool, giving the designer the option to explore design alternatives before the physical...
The scaling of semiconductor technologies is leading to processors with increasing numbers of cores. A key enabler in manycore systems is the use of Networks-on-Chip (NoC) as a global communication mechanism. The adoption of NoCs in manycore systems requires a shift in focus from computation to communication, as communication is fast becoming the dominant factor in processor performance. Many researchers...
Today many of the high performance embedded processors already contain multiple processor cores and we see heterogeneous manycore architectures being proposed. Therefore it is very desirable to have a fast way to explore various heterogeneous architectures through the use of an architectural design space exploration tool, giving the designer the option to explore design alternatives before the physical...
Modern high performance cluster systems for parallel processing are employing multi-core processors and high speed interconnection networks. Efficient mapping of the processes of a parallel application onto cores of such a cluster system, plays a vital role in improving the performance of that application. Parallel application can be modelled as a weighted graph showing the communication among the...
Dataflow computing is proved to be promising in high-performance computing. However, traditional dataflow architectures are general-purpose and not efficient enough when dealing with typical scientific applications due to low utilization of function units. In this paper, we propose an optimization of dataflow architectures for scientific applications. The optimization introduces a request for operands...
Named Data Networking (NDN), an information-centric Internet architecture, introduces a new forwarding model, in which the forwarding plane can choose between multiple interfaces when forwarding a packet. While the forwarding module brings new opportunities it also introduces challenges when the application's performance or correctness is affected by a conflict between the application design and the...
In this dark silicon era, techniques have been developed to selectively activate nonadjacent cores in physical locations to maintain the safe temperature and allowable power budget on a many-core chip. This will result in unexpected increase in the communication overhead due to longer average distance between active cores in a typical mesh-based Network-on-Chip (NoC), and in turn reduce the system...
This paper presents an overview of recent trends in Battery System Management Architectures (BSMAs). After introducing the main characteristics of large battery packs, the state of the art in BSMAs is discussed. Two emerging concepts are in the focus of this contribution. On the one hand, there is a development from centralized battery management architectures with a single control entity towards...
This paper addresses an interworking model of transport network controllers including SDN and Non-SDN controllers. It has an overview of recent research and standard activities, classifies types of transport network controllers, and proposes a SDN and Non-SDN interworking model. For verifying the proposed interworking model, it leads to a 3-tiers reference model from the interworking architecture...
Vehicular ad hoc network (VANET) is a valuable and important wireless ad-hoc network which uses advanced wireless technologies. It has become most popular in this digital world of Internet Of Things(IOT) because of it wide verity of applications such as e-commerce on the fly in vehicles, sharing multimedia contents such as audio, video, playing games, multihop dissemination of emergency messages to...
Recent work has proposed the high-level synthesis of parallel software programs (specified using Pthreads or OpenMP) into concurrently operating parallel hardware modules [6]. In this paper, we describe resource and memory management techniques for improving performance and area of hardware generated by such software thread synthesis. One direction investigated pertains to how modules in the HLS-generated...
Network Functions Virtualization (NFV) is a recent networking trend gaining a lot of attention from telecom operators and vendors. It promises to virtualize entire classes of network node functions within a data-center and to deliver network services in the form of Virtualized Network Function (VNF) service chains using commercial off-the-shelf hardware and IT virtualization technologies. However,...
The systems of interconnection play a major role in the performance expected by System on chip (SoC). With the evolution of technology, conventional shared-bus based interconnections are no longer the ideal solution for the future SoC. Therefore Network on chip (NoC) is emerging as a perfect solution to enhance the communication structures for future SoC. Compared with the conventional interconnection...
Network-on-chip has been proposed to address the global interconnection problems of System-on-Chip. One of the key factors that affects performance of the network-on-chip is its topology. Mesh is the most popular topology because of its scalability and simplicity in physical implementation. But, their performance degrades with size scaling up due to extra hops. Centralized router is proposed as a...
Smart Identifier NETwork (SINET), as a novel proposal for future Internet architecture, is expected to make the current Internet flexible. SINET is featured by completely resolving the triple-binding related issues of current Internet, namely resource-location binding, user-network binding and control-data binding. Due to thorough and rigorous redesign of the Internet, SINET is equipped with many...
We explore a novel model of computation based on nodes that have no public addresses (ids). We define nodes as concurrent, message-passing computational entities in an abstract communication medium, similar to the Actor model, but with all public node ids elided. Instead, drawing inspiration from biological systems, we postulate a send-to-behavior language construct to enable anonymous one-way communication...
It’s been quite a while since scientists are seeking for the ancestor of von Neumann computing architecture. Among the most promising candidates, memristor demonstrates advantageous characteristics, which open new pathways for the exploration of advanced computing paradigms. In this work we propose the design of a novel crossbar geometry, which is heterogeneous in terms of its cross-point devices,...
Data-centers play a fundamental role in cloud computing. As the market of cloud computing continues to scale, it becomes increasingly difficult to utilize resources in large data-center networks. There is a growing interest to seek for efficient data-center architectures among academia and industry. Software-defined Networking (SDN) is a promising technology to develop scalable network architectures...
A step-up DC-DC converter (non-isolated) based on the current diverter principle is shown. This converter is intended for renewable energy sources or distribution networks for elevating the voltage from LV to MV levels. The relationship of stage number, duty cycle and efficiency is analyzed. In addition first measurement results with a low voltage prototype are shown.
SDN and NFV are two paradigms that introduce unseen flexibility in telecom networks. Where previously telecom services were provided by dedicated hardware and associated (vendor-specific) protocols, SDN enables to control telecom networks through specialized software running on controllers. NFV enables highly optimized packet-processing network functions to run on generic/multi-purpose hardware such...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.