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The qubit method and hardware/software implementations of parallel synthesis of tests for black box logic defined by Q-coverage are represented. A theoretical background of methods application for a wide class of digital circuits implemented in programmable logic devices is given.
Fault diagnosis methods for specified fault models might deduce wrong faults as suspicious candidate faults (misprediction). The methods might not be able to also deduce suspicious candidate faults (non-prediction). In this paper, a fault diagnosis method for a single universal logical fault model in scan testing is proposed. In the fault diagnosis method, a diagnostic fault simulation for a single...
Since recently, UAVs (Unmanned Aerial Vehicles) have increasingly been recognized as a reliable, and effective means of aerial surveillance. Deployment of UAVs in disaster management for aerial surveillance and real-time video feed, when land access is cut off, is one of the most prominent applications. The ability of small, lightweight UAVs in aerial access and gathering data, in areas that are insecure...
The alternate test paradigm has been proposed as a low-cost replacement to expensive and time consuming conventional specification tests of analog/radio-frequency (RF) integrated circuits. Feasibility of alternate tests may be compromised if the pertinent models that are used for the prediction of a circuit's performance are of poor accuracy. To construct accurate models across the whole design space,...
A new fault modeling and simulation method based on VLSI is proposed to evaluate the fault coverage in VLSI accurately. Firstly, inject the circuit-level faults into the logic gates by means of simulation and experiments. Built the fault dictionary consisted of MTTs by analyzing the experimental effect of faults on function. Secondly, considering the MTTs and their weights, a testing coverage model...
We present a methodology for algorithmic generation of test signals for thedetection and diagnosis of a variety of short and open-circuit defects in analogcircuits. Prior algorithms have focused on test generation for known short oropen defect values. This places the burden of failure coverage on accurateanalysis of observed defects in known failed parts at high cost. In this work, we optimize the...
In this paper, we show how two key techniques in the testing and verification areas - namely mutation testing and assertion based verification (ABV) - can be combined in a novel way to help improve the effectiveness of verifying design correctness. Through assertion based test generation, multiple mutated designs and their test sequences are concurrently simulated using a GPU, in order to determine...
Unstable behavior of discrete-time systems cooperating with continuous-time sub-blocks is analyzed. Typical examples are the instabilities in convolution digital filters operating in feedback loops together with AD and DA converters, analog anti-aliasing and smoothing filters, and other application circuits. It is shown that the stability of such systems can, in linear cases, be tested via the location...
Iterative scan diagnosis is often needed for both the first silicon and the hard-to-diagnose chips. The chips in question are extracted from wafers and re-tested on a debug platform to arrive at a reasonable number of probable defect candidates that can be physically analyzed. This requires a large setup time and multiple iterations of deterministic diagnostic test pattern generation and application...
Motivated by the recent success of the algebraic computation technique in formal verification of large and optimized gate-level multipliers, this paper proposes algebraic equivalence checking for handling circuits that contain both complex arithmetic components as well as control logic. These circuits pose major challenges for existing proof techniques. The basic idea of Algebraic Combinational Equivalence...
A design optimization method based on dependency model is proposed for Built-in test design in Prognostics and Health Management. Firstly, simplify the dependency model, eliminate the redundant test and merge the fuzzy fault model. Secondly identify the minimum test vector matrix to each fault mode. Under the principles of reliability and costs, determine the optimal test vector, which is used as...
This paper presents an original approach to estimate the accuracy of numerical algorithms of transient analysis for four test problems. The tests are presented as mathematical models and electronic circuits too. Test problems and methods of estimation of numerical analysis algorithms' accuracy proposed in the present paper can be used in circuit simulators and in computer mathematics programs to test...
Based on the model of memeristor fabricated at HP laboratory, a new multiplexed flip-flop is proposed which can support power-off mode for scan testing. Testing data can be stored in memristor during the power-off time. The analyzes are verified with SPICE simulation, signal waveforms show that the presented memristive multiplexed flip-flop meet the requirements for low-power scan testing.
Aiming at evaluating the SEE performance of complex electronic system, the multi-signal flow graph (MSFG) method is adopted. Based on the theory of the MSFG, the SEE soft error propagation model is proposed, and an analysis methodology is stated. For complex electronic system which consists of VLSIs devices, such as SRAM-based FPGA, the MSFG model has been established and simulated in TEAMS software...
The reliability of RF/microwave power amplifiers (PAs) is key issue for the transceivers, since the PA is one of the most critical building blocks in RF front-ends of the wireless/mobile communication systems. To effectively evaluate the reliability of the RF/microwave PAs, it is essential to conduct specific reliability test, especially for the temperature, since temperature is considered to be the...
It is shown experimentally that active resistance of frequence dependent device keep his high value till the currents of several kiloampere at the frequencies from 60 kHz up to 200 kHz. It points out on the working capacity of device not only at operating current but at lightning strokes.
Power distribution equipment is the backbone of any Industrial process infrastructure. Safety and reliability are the two most important criteria in the proper functioning of the power distribution system. Low voltage switchgear is an important part of power distribution. Minimizing arcing faults in the switchgear is of utmost importance to enable a safe environment. Arcing faults increase the temperatures...
An overview on the implementation of new physical effects into the heterojunction bipolar transistor compact model HICUM/L2 is presented along with a description of the quality testing procedures performed before its public release for production circuit design in commercial simulators. Related topics such as potential measures for model run time improvements and failures are also discussed. Significant...
Formal verification utilizing symbolic computer algebra has demonstrated the ability to formally verify large Galois field arithmetic circuits and basic architectures of integer arithmetic circuits. The technique models the circuit as Gröbner basis polynomials and reduces the polynomial equation of the circuit specification wrt. the polynomials model. However, during the Gröbner basis reduction, the...
The test generation problem for analog/RF circuits has been largely intractable due to the fact that repetitive circuit simulation for test stimulus optimization is extremely time-consuming. As a consequence, it is difficult, if not impossible, to generate tests for practical mixed-signal/RF circuits that include the effects of tester inaccuracies and measurement noise. To offset this problem and...
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