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The paper discusses a variety of sensors to enable a built-in test in RF devices. The list of sensors includes dummy circuits, process control monitors, DC probes, an envelope detector, and a current sensor. Dummy circuits and process control monitors are simple circuits that do not tap into the signal path of the RF device. Instead, they monitor the device by virtue of being subject to the same process...
This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and analysis of the two-tone response envelope of the device under test (DUT). The response envelope is processed to obtain a simple digital signature sensitive to key specifications of the DUT. The analytical basis of the proposed methodology is demonstrated,...
A 2.4 GHz high linearity and low noise down-conversion mixer is designed in SMIC 0.18-μm RF CMOS technology, which will be used in applications such as IEEE 802.11b/g WLAN, Wi-Fi Systems, ISM Band Systems, etc. The proposed mixer adopted Source inductor degeneration and current-reuse bleeding technique. The simulation results show that under a single 1.8 V supply voltage, the mixer achieves: -0.34...
Multi-mode, multi-band Softransceiver core allows seamless support for the second to the fourth generation of modern wireless standards. Targeting such a transceiver core becomes a stretch goal as one implementation needs to simultaneously meet the conflicting requirements for various standards. Such a goal is achieved by designing radio-frequency and baseband circuits such that various operational...
Two 23 GHz low-noise amplifier (LNA) have been designed and implemented by 45 nm planar bulk-CMOS technology with high-Q above-IC inductors. In the designed LNAs, the structure of cascode amplifier with source inductive degeneration is used. All high-Q above-IC inductors have been implemented by thin-film wafer-level packaging (WLP) technology. The fabricated one-stage LNA has a good linearity where...
Volterra analysis of the ultra high-speed CMOS switched source follower (SSF) track and hold amplifier (THA) is presented based on a simplified RF model. Approximate expressions for the transfer function, the harmonic equations and third-order intermodulation distortion equation are derived respectively. Simulations based on a commercial available 65 nm CMOS process technology are performed with the...
The past several years have successfully brought all-digital techniques to the RF frequency synthesis, which could arguably be considered one of the last strong bastions of the traditionally-analog design approaches. With their high sensitivity and high dynamic range requirements, the RF circuits have long had a good excuse to avoid any possible source of digital switching activity. With the constant...
An extended true-single-phase-clock (E-TSPC) dual-modulus prescaler with a division ratio of 2 and 3 employs the forward body biasing (FBB) technique for achieving efficient on-the-fly speed and power control. The circuit is implemented in 0.25 urn CMOS. With the forward body bias voltage of 0.7 V applied to N- and P-FET's, the maximum operating frequency is improved by 80 and 87 % in the divide-by-2...
A direct conversion receiver is demonstrated which operates in the presence of a rail-to-rail (+12.4dBm) out-of-band blocker and a -16.3dBm blocker, where the ICP1 is +12.5dBm and the uncorrected extrapolated IIP3 is +33.5dBm. IM distortion is adaptively cancelled via feedforward loops which are digitally expanded to reproduce higher order nonlinear reference terms. Cancellation improves input-referred...
A 60 GHz 32 element bidirectional phased-array TX/RX chip with a 2 bit phase shifter and IF converter to/from 12GHz, using 90nm CMOS process, is described. The array features 12.5 dB gain, noise figure (NF) of 11 dB, IP1dB of -17dbm for RX, and total output Psat of +8dBm for TX, drawing 390 mA from a 1.3-V supply. The RMS amplitude and phase error of the phase shifter is 0.8dB and 5° max respectively...
Parametric circuits constitute a longstanding RF technique that has been largely ignored by the RFIC community. Increasing interest in applying CMOS to (sub)millimeter-wave applications plus mounting scaling complexity may combine to revitalize this circuit style. This paper presents basic parametric downconverter structures, their theory of operation, and the benefits to be gained from CMOS implementation...
A 60-GHz receiver front-end with an integrated 180° out-of-phase Wilkinson power divider using standard 0.13 μm CMOS technology is reported. The receiver front-end comprises a wideband low-noise amplifier (LNA) with 12.4-dB gain, a current-reused bleeding mixer, a baseband amplifier, and a 180° out-of-phase Wilkinson power divider. The receiver front-end consumed 50.2 mW and achieved input return...
This paper presents the effects of a deep n-well junction on RF circuit performance based on a 0.35um SiGe technology. With a combination of measurement and field solver results, it shows that the deep n-well yields about 20 dB of isolation and eliminates the inter-block noise coupled through the substrate in certain degree. The isolation varies with different junction voltage and at different frequency...
A self-matched ESD cell library has been implemented in a commercial sub-100nm CMOS process for 60-GHz broadband RF applications. This ESD cell library has reached the 50-Ω input/output matching to reduce the design complexity for RF circuit designer and to provide suitable electrostatic discharge (ESD) protection. Experimental results of this ESD cell library have successfully verified the ESD robustness...
A VCO-based RF modulator employing multiphase Pulse Width Modulation (PWM) is presented. The proposed RF modulator encodes the baseband signal into a set of multiphase PWM signals which are generated by a VCO-based opamp. The use of PWM avoids broadband quantization noise which is produced by ΣΔ modulation used in other RFDAC-based modulators. The prototype IC is fabricated in a 45nm CMOS process,...
High-performance interface electronics design for two MEMS-based wireless sensing applications, (1) strain sensing and (2) implantable blood pressure sensing, is presented. In a wireless MEMS strain sensing microsystem, a MEMS capacitive strain sensor is interfaced with a custom-designed ASIC consisting of a low-noise continuous-time synchronous-detection capacitance-to-voltage converter and a 2nd...
With the ever-increasing functionalities of cellular smart phones and other communication systems, RF circuits at multi-GHz frequencies have recently migrated to the state-of-the-art low-cost digital CMOS processes despite their unfriendly analog design environment. The use of digital techniques to assist RF performance is becoming a common practice. However, there is a general fear that a fully integrated...
This paper presents an innovative time-domain simulation method, especially conceived for simulating strongly nonlinear RF circuits whose state variables are all fluctuating in a fast-varying time scale, but evidence different time evolution rates in a slow envelope time scale. The method uses the mathematical method of lines based on modern multirate Runge-Kutta (MRK) schemes, and operates within...
The development of monostatic multi-protocol UHF RFID interrogator is presented. It utilizes highly integrated IDS-R902DRM reader IC, enabling cost-efficient solutions with minimum mechanical dimensions. This IC also includes dense reader mode function which prevents reading conflicts in a multi-reader environment. Emphasis is placed on the firmware design. Implementation of each supported RFID protocol...
The diode operated in forward-biased condition has been widely used as an effective on-chip ESD protection device at GHz RF and high-speed I/O pads due to the small parasitic loading effect and high ESD robustness in CMOS integrated circuits (ICs). This work presents new ESD protection diodes realized in the octagon, waffle-hollow, and octagon-hollow layout styles to improve the efficiency of ESD...
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