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This paper describes a new 2-1 cascaded hybrid sigma delta modulator where the discrete time filter is realized with fully differential current conveyor. The hybrid convertor, which is a combination of an analog integrator and two digital integrators, offers an increased dynamic range, helps make the resulting high-order sigma delta modulator stable and reduce power consumption comparing with discrete...
The hybrid fully differential second order Gm — C lowpass filter constructed from an operational transconductance amplifier and a PMOS source follower is presented in this paper. This proposed LPF is simulated using 0.35 μm standard CMOS process and consumes 9.19 nW at 1.5 V power supply for 100 Hz bandwidth. The bandwidth of this proposed LPF is tunable from 10 Hz to 1 kHz. The benchmarks between...
The proposed method uses a simultaneous pre-charging schema to sensing capacitance change on the sensing pad. In order to compensating the unstable sensing value due to the changing in power supply, an extra reference capacitor pair is adding to the schema. With simultaneous pre-charging schema, all of the sensing capacitors (Cs) including reference capacitors are charged to same voltage level before...
A fully-digital True Random Number Generator (TRNG) measures the frequency difference between two free-running ring oscillators, or in other words the beat frequency, to extract random frequency jitter. For generating a continuous stream of random bits with a high entropy level, the lower significant bits meeting the NIST randomness criteria are concatenated. The generation efficiency is further improved...
This paper presents a biopotential analog front-end (AFE) IC for measuring electroencephalogram (EEG). The AFE is based on the AC-coupled chopper stabilized instrumentation amplifier architecture to achieve the low noise. To increase the input impedance, the capacitive input impedance boosting loop (CIIBL) is proposed. The CIIBL forms a positive feedback loop between input and output of the instrumentation...
Currently, there is immense incentives-driven research, in the automotive industry to develop Plug-In Electric Vehicles (PIEVs) to reduce the green-house gas emissions and to comply with the Kyoto accord. Isolated High frequency AC-DC converters are a major component to transfer power from utility mains to the traction battery packs which store energy for the EV motors propulsion. The front-end AC/DC...
We present measurements from a prototype array of superconducting kinetic inductance detectors optimized for 150 GHz radiation and commercially fabricated from 20 nm aluminum films on silicon wafers.
A configurable three-level sigma-delta ADC for both DC measurement and audio conversion is implemented in a 40 nm CMOS process. It employs a switch-capacitor level shifter to increase the DC input range. Dynamic Element Matching (DEM), typically used in traditional multilevel feedback DAC, is avoided by setting proper common-mode (CM) voltage. Using a time-sharing technique, the three-level quantizer...
This paper presents an original concept of a 3D-PICS High density Integrated Passive Device Technology with P+ guard rings realized in a 300µm depth High Resistivity Silicon Substrate (HRS) in order to reduce significantly the substrate noise coupling. In this paper, a 3D-PICS IPD test chip was studied as the passive part prototype of a System-In-Package chip in combination with RF transceiver operating...
This paper describes the development of a high voltage, high power, and high efficiency LLC converter used in a delta 3-phase rectifier that meets the requirements imposed by today's telecom market. Initially, a comparative analysis of different LLC topologies is performed to determine the best option for the targeted application. Then, an empirical method, based on the plant frequency response, is...
An operational amplifier is described which uses separate loops to control the output voltage and the error voltage between its inputs. To a large extent this architecture combines the high-speed characteristics of “current feedback” amplifiers with the low input referred errors of precision architectures. The technique has been applied to produce an amplifier with precision characteristics comparable...
This paper describes a top-down approach to design a Sigma-Delta based modulator for analog to digital conversion. The primary focus is on designing an ADC for audio application, thus, the conversion is done on a 22.05 kHz bandwidth with a 16-bit resolution (CD quality). The behavioural code of the modulator is created first to check the signal ranges on internal nodes. Next, the circuit non-idealities,...
DC Motors are quite common in large number of applications ranging from small tools to large industrial machines. Efficiency of such machines depends on proper operation of these motors to a much larger extent. Moreover, heavy duty applications require high current demanding motors. High current also leads to addition of other noise issues. Here we put forward a high performance motor drive circuit...
This paper presents a digitally calibrated 12bit 12.5-MS/s successive-approximation-register (SAR) analog-to-digital converter (ADC) intended for low-power wireless communication and medical instrumentation. The performance of the proposed prototype is enhanced by two techniques. A power saving strategy is proposed. Also, several foreground calibration methods for SAR ADCs are proposed to reduce the...
A novel completely inverter-based ADC driver is proposed that relaxes the gain and unity gain bandwidth requirements of the negative feedback loop by making it not see the closed loop gain. This ADC driver has a built-in first order anti alias filter and uses a passive amplifier to provide a rail-to-rail sampled output signal. This design exploits the linearity of current mirrors and achieves 65dB...
It is traditionally difficult to implement higher order PWM closed loop class-D audio amplifiers using analog techniques. This paper describes a mixed signal approach, implementing a 4th order amplifier in 55nm CMOS with minimal demands on a front-end ADC. An approach to design the feedback loop in the digital domain with high gain throughout the audio band (100dB at DC) to improve linearity and PSRR...
Power supply noise generated by integrated circuits is one of the major sources of EM radiation from PCBs. The reduction of power supply noise can be realized by means of devices that bypass the current among power supply planes, such as bypass capacitors, ground vias and so on. In a previous work the effect of current bypass devices on the far field radiation from multilayer PCBs was very efficiently...
This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output...
Thoroughly studying the brain activity of freely moving subjects requires miniature data acquisition systems to measure and wirelessly transmit neural signals in real time. In this application, it is mandatory to simultaneously record the bioelectrical activity of a large number of neurons to gain a better knowledge of brain functions. However, due to limitations in transferring the entire raw data...
A wideband, low-power, low-noise and area-efficient analog front-end (AFE) for acquiring neural signals is described. The AFE builds upon existing architectures but uses block-wise optimization to achieve superior performance when used in a multichannel system with scalable channel count. The AFE is also the first of its kind to enable acquisition from extended neural bandwidths greater than 10 kHz...
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