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This paper presents a practical phase noise measurement approach, which only requires a spectrum analyzer and a computer, featuring fast setups, accurate results and low cost. Not like the conventional methods using extra assistant circuits to get rid of the frequency drift problem, this approach takes advantage of modern spectrum analyzers to acquire IQ data to calculate phase noise. The low quantization...
The design of a low-voltage fast-transient low-dropout regulator (LDR) with a current feedback buffer (CFB) for system-on-ship (SoC) applications is presented. When the CFB senses variation in the load current, it quickly controls the power transistor to achieve fast-transient and small output voltage variation. The proposed LDR has high current efficiency because the CFB can adjust the quiescent...
This paper presents a conditional capacitor averaging technique to enhance the linearity of 2.5-bit/stage high-resolution pipelined ADCs with capacitor mismatch. Design concepts of capacitor averaging and sorting techniques are employed to mitigate the error effect of capacitor mismatch. Moreover, the sorted capacitors and digital-to-digital converter (DAC) voltages in a 2.5-bit multiplying analog-to-digital...
A low-voltage and high-linearity downconverter RFIC design using TSMC 0.18 μm CMOS foundry for WiMAX applications is presented in this paper. The LC resonator is used to block DC and RF signals for low supply voltage and the multiple-gated CMOS is adopted to eliminate third-order nonlinear term for high linearity. The crucial simulated results of WiMAX downconverter include that a conversion gain...
A low voltage current sensing circuit is presented in this paper. The proposed current sensing circuit performs continuous-tracking with high accuracy over 98% is achieved. The current sensing circuit is implemented with a standard 0.18μm CMOS process at 1.5V supply voltage. The power efficiency obtains 89% over the maximum load current of 540mA. Wide operation frequency range from 400kHz to 25MHz...
In this paper, a wireless telemetry using the near-field coupling technique with round-wire coils for an implanted pacemaker is presented. The proposed system possesses an external powering amplifier and an internal bidirectional microstimulator. Even with a low induced voltage, all the circuitries associated with the implantable stimulator are operated normally by the coupling power interface, which...
In this paper we propose a variable-gain transimpedance amplifier suitable for low-power applications. Its noise, bandwidth and input impedance performance are similar to a more conventional regulated-cascode common-gate transimpedance with resistive load, with the same power consumption and gain performance. The proposed amplifier has, however, variable gain, which can be easily changed by setting...
A unified design is presented that can execute floating-point CORDIC operations in both rotation and vectoring modes with significantly reduced computation latency. Unlike previous pipelined CORDIC implementations usually requiring a sequence of micro-rotation stages proportional to bit accuracy, the proposed design consists of only two stages, coarse and fine stages, with each stage realized using...
The following topics are dealt with: body network application; near-field telemetry; LED driver; MOSFET devices; SRAM circuit; light emitting diode; on-chip reference oscillators; CMOS optical receiver; ring oscillator delay; CMOS inverter; NMOS driver; digital DC-DC converter; low power switched capacitor; low power dual-mode pulse triggered flip-flop; VLSI architecture; and thin film transistor.
In this paper we present a low-power and small-area balun LNA. The proposed inverter-based topology uses self-biasing and noise cancelling, yielding a very robust LNA with a low NF. Comparing this circuit with a conventional inverter-based circuit, we obtain a ~3 dB enhancement in voltage gain, with improved robustness against PVT variations. Simulations results in a 130 nm CMOS technology show a...
This paper presents the systematic design approach of a low-power, medium-resolution, high-speed pipelined Analog-to-Digital Converter (ADC). The ADC is implemented in 180nm digital CMOS technology. The converter achieves signal-to-noise distortion ratio of 59.8 dB, spurious-free dynamic range of 89 dB and effective number of bits of 9.64-bits at sampling speed of 50MHz with an input signal frequency...
This paper presents a transmitter design for Ultra Wideband Impulse Radio (UWB-IR) communications. The design is targeted towards the implementation of passive Wireless Sensor Tags (WST) where micro-power consumption is required. The transmitter has been implemented in UMC 0.18μm CMOS and placed inside a QFN lead-less package. It complies with the FCC regulations for Pulse Rate Frequencies (PRF) up...
A differential delay cell with complementary current control to extend the control voltage range as well as the operation frequency is proposed for high speed and wide tuning range voltage-controlled ring oscillator (VCRO). The complementary current control mitigates the restriction that control voltage can not operate at full range in a conventional VCRO. A three-stage VCRO is constructed for verifying...
Power efficiency is a very important issue for portable electronic devices since it determines the battery life. The backlight module usually accounts for the major part of power dissipation in a portable device. Thus, to extend the operation time of a portable device, a high efficiency backlight module should be employed. White light-emitting diodes (WLEDs) have replaced cold cathode fluorescent...
The novel design with the adaptability prevents from unexpected stimulus current for medical safety, since the safety is the prime concern for human use. The prototype of the stimulus driver circuit for micro-stimulator used in implantable device is presented in this paper. For epilepsy control, the target of the driver is to output 30-μA stimulus currents, as the tissue impedance varies within 20~200...
In this paper, a CMOS chip with programmable capability for cyclic redundancy check (CRC) operation is proposed. By the programmable function, the circuit provides function of CRC-4, CRC-5, CRC-8, or CRC-16. The dual encoding functions including Manchester and Miller codes are also obtained from the circuit. In addition, amplitude-shift keying (ASK) and frequency-shift keying (FSK) modulations are...
In this paper, a new circuit topology to realize a stacked self-oscillating LNA-Mixer is proposed. The basic idea has been to recognize that in a high-performance down-conversion mixer its RF input-stage gain, linearity, and noise tradeoff is often improved by feeding it with a bypass current source. This current source could be isolated with an inductor so as to allow free implementation of the oscillator...
In embedded systems design, low power design must be the problems faced. From this, mainly from the CPU CMOS circuit design, low consumption of dynamic power management from three aspects, low-power embedded system design, is analyzed.
A Vernier Gate-Ring-Oscillator (GRO) Time to Digital Converter (TDC) is proposed and implemented in 90-nm CMOS process technology. It utilizes two GRO chains as the delay lines. The time resolution is determined by the difference between two delays, so not limited by the process. Moreover, the quantization noise can be first-order shaped by the gated behavior in the oscillators, which further improves...
Electrostatic discharge (ESD) is an inevitable event in CMOS integrated circuits. Layout structure is one of the important factors that affect ESD robustness of MOS transistors. In this work, the impact of inserting additional layout pickups to ESD robustness of both multi-finger NMOS and PMOS transistors has been studied in a 90-nm CMOS process. Measurement results have shown that multi-finger MOS...
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