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SpaceWire is a standard for on-board satellite networks chosen by the ESA as the basis for future data-handling architectures. However, network designers need tools to ensure that the network is able to deliver critical messages on time. Current research only seek to determine probabilistic results for end-to-end delays on wormhole networks like SpaceWire. This does not provide sufficient guarantee...
In this paper, we present a new multilevel hierarchical (tree-based) coarse-grained FPGA architecture. This architecture comprises two unidirectional interconnects, a downward interconnect and an upward interconnect. The proposed architecture can support various kinds of coarse-grained blocks. These coarse-grained blocks are defined using an architecture description file. A new software flow has been...
This paper addresses capacitated location-routing problems (CLRP). Those distribution network design problems involve depot (or hub) location, fleet assignment and routing decisions. The distribution networks under investigation are characterized by several depots, by a capacitated homogeneous vehicle fleet and by a set of customer nodes to be serviced with demands. The objective is to assign the...
This paper proposes a new process mapping scheme called adjacency-based mapping (AM) for irregular cluster systems assuming that the two-dimensional mesh process topology is specified as an interprocess communication pattern. The proposed AM tries to map neighboring processes in virtual process topology to adjacent processors in physical processor topology. Simulation study shows that the proposed...
Network security administrators cannot always accurately tell which end-to-end accesses are permitted within their network, and which ones are not. The problem is that every access is determined by the configurations of multiple, separately administered, components. As configurations evolve, a small change in one configuration file can have widespread impact on the end-to-end accesses. Short of exhaustive...
Recent work has revealed a new, relatively simple and possibly cost-effective, approach to achieve combined protection of optical networks against both node and span failures. The resulting network designs use only a single set of p-cycle structures that have the same or only slightly more capacity than a corresponding optimal set of p-cycles for span protection. The new principle is based on a generalization...
A significant drive to consolidate data center networks on a single infrastructure is taking place. 10-Gigabit Ethernet is one of the contenders to fulfill the role of universal data center interconnect. One of the key features missing from conventional Ethernet is congestion management; this void is being filled by the standardization work of the IEEE 802.1Qau working group. However, the schemes...
The rate of injecting packets into the network should be regulated carefully because the packet latency could increase rapidly if the network saturated. In order to solute this problem, we present a new flow control strategy which can be coupled with any routing algorithm. In particular, we introduce the notion of Injection Level, a set of values of injection rate. We expect to simplify the process...
We envision an information-centric future Internet where the network is built around named pieces of data instead of explicitly addressable hosts. One clear way of implementing information-centric networking is using publish and subscribe (pub/sub) operations instead of the send and receive primitives. Internet-like pub/sub networking requires completely different routing protocols and forwarding...
We present a session initiation protocol (SIP) network design for a voice-over-IP (VoIP) network to prevent congestion caused by people calling friends and family after a disaster. The design increases the capacity of SIP servers in a network by using all the SIP servers equally. The design uses a property that SIP network elements do not carry voice data packets but signaling packets instead. Furthermore,...
In order to satisfy the requirement of aerocraftpsilas multi- transmission for further development, the paper leads to a resolution about on-board Spacewire routing technology. Based on the network level analysis of Spacewire standard, it built the architecture of router with wormhole routing theory. A simulation model of router had been set to verify the design, and braking-problem from wormhole...
A snap-stabilizing protocol, starting from any configuration, always behaves according to its specification. In this paper, we present a snap-stabilizing protocol to solve the message forwarding problem in a message-switched network. In this problem, we must manage resources of the system to deliver messages to any processor of the network. In this purpose, we use informations given by a routing algorithm...
Nowadays, scalability, parallelism and fault-tolerance are key features to take advantage of last silicon technology advances, and that is why reconfigurable architectures are in the spotlight. However, one of the major problems in designing reconfigurable and parallel processing elements concerns the design of a cost-effective interconnection network. This way, considering that Multistage Interconnection...
The present paper presents considerations on using a low power routing solution for prolonging the battery life for motes within a wireless sensor network (WSN) without affecting the network connectivity. The solution applies for the cases when, the distances between motes and base stations are over the mote's communication range, and motes located between sinks and base station are commonly used...
The power consumption of interconnects is increased as the link bandwidth is improved in PC clusters. In this paper, we propose an on/off link activation method that uses the static analysis of the traffic in order to reduce the power consumption of Ethernet switches while maintaining the performance of PC clusters. When a link whose utilization is low is deactivated, the proposed method renews the...
Design constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3D chip stacks an enticing technology solution for massively integrated electronic systems. The scarcity of vertical interconnects however imposes special constraints on the design of the communication architecture. This article examines the performance and scalability of different...
Chip Multi-processor (CMP) architectures have become mainstream for designing processors. With a large number of cores, Networks-on-Chip (NOCs) provide a scalable communication method for CMP architectures. NOCs must be carefully designed to meet constraints of power consumption and area, and provide ultra low latencies. Existing NOCs mostly use Dimension Order Routing (DOR) to determine the route...
This paper demonstrates how to rapidly build useful, and high performance self-timed or elastic communication networks. The networks are elegantly extensible to include an arbitrary number of Producers and Consumers. Each switch within the network is built from multiple instances of a Latch Control Element (LaCkEy). The Lackey is a general circuit for self-timed data control. It is built once and...
In this paper, a new fault-tolerant Clos network is presented by adding extra switches and redirecting boxes in ordinary Clos network. The extra switches and redirecting boxes can improve the run time of the routing algorithm significantly when the Clos network displays few or no faults. The paper also presents a fault-tolerant routing algorithm for fault-tolerant Clos network. This algorithm employs...
In modern system-on-chips the communication architecture is a crucial part of the design for performances and power constraints because the number of modules is increasing due to continuous integration scale. Network-on-Chip (NoC) architecture lets to obtain greater performances over the traditional communication architectures. NoC design is more complex because there are more components and networks...
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