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Running Big Data applications in the cloud has become extremely popular in recent times. To enable the storage of data for these applications, cloud-based distributed storage solutions are a must. OpenStack Swift is an object storage service which is widely used for such purposes. Swift is one of the main components of the OpenStack software package. Although Swift has become extremely popular in...
Field Programmable Gate Arrays (FPGAs) are usually perceived as difficult to exploit due to the High Level of expertise required to program them. In the last years, the major FPGAs vendors have produced different High Level Synthesis (HLS) tools to help programmers during the flow of acceleration of their algorithms through the hardware architecture. However, these tools often use languages considered...
A number of computational science algorithms lead to discretizations that require a large number of independent small matrix solves. Examples include small non-linear coupled chemistry and flow systems, one-dimensional sub-systems in climate and diffusion simulations and semi-implicit time integrators, among others. We introduce an approach for solving large quantities of independent banded matrix...
The emerging Fog Computing paradigm provides an additional computational layer that enables new capabilities in real-time data-driven applications. This is especially interesting in the domain of Smart Grid as the boundaries between traditional generation, distribution, and consumer roles are blurring. This is a reflection of the ongoing trend of intelligence distribution in Smart Systems. In this...
This paper describes the design flow of the standard cell characterization on five different technologies and integration of its results with other VLSI tools processes that can be duplicated and implemented for the research and education in the academia. In this proposed work, one design flow is on non-fabricable technology of open-source false-technology FreePDK45 of 45 nm CMOS technology [1]. The...
This research paper is a study on trade-off of using Java to create cluster capable of achieving high-performance computing. Here we have made a distributed computing architecture in Java using Low-level API implementations. Time is crucial in any field of work. We value fast and optic results. Creating cluster base through traditional method using C, C++ or FORTAN programming language can be tedious,...
Patent analysis helps companies understand their intellectual property (IP) portfolio and develop competitive marketing and management strategies. A Technology Function Matrix (TFM) is a critical approach for patent data analytics. This paper develops a generic computer supported TFM construction methodology that can be used for creating patent technical maps for any given domain. The approach is...
Accelerating relational databases in general and SQL in particular has become an important topic given thechallenges arising from large data collections and increasinglycomplex workloads. Most existing work, however, has beenfocused on either accelerating a single operator (e.g., a join) orin data reduction along the data path (e.g., from disk to CPU). In this paper we focus instead on the system...
Library based design and IP reuse have been previouslyproposed to speed up the synthesis for large-scale FPGAdesigns. However, previous library based design flow faces severalunresolved challenges. Firstly, there may result in large wastearea between the modules due to the difference in module sizes. While utilizing multiple ratio modules can help to reduce thewaste area, pre-synthesis each module...
Depending on one's viewpoint, a generic standards-compatible web browser supports three, four or five built-in application rendering and programming models. In this paper, we provide an overview of the built-in client-side web application architectures. While the dominance of the base HTML/CSS/JS technologies cannot be ignored, we foresee Web Components and WebGL gaining popularity as the world moves...
Extracting value from data stored in object stores,such as OpenStack Swift and Amazon S3, can be problematicin common scenarios where analytics frameworks and objectstores run in physically disaggregated clusters. One of the mainproblems is that analytics frameworks must ingest large amountsof data from the object store prior to the actual computation;this incurs a significant resources and performance...
This paper addresses the problem of automatic technology migration of analog IC designs. The proposed method introduces a new level of abstraction, for EDA tools addressing analog IC design, allowing a systematic and effortless adaption of a design to a new technology. The new abstraction level is based on generic cell libraries, which includes topology and testbenches descriptions for specific circuit...
An asynchronous high-performance low-power 5-port network-on-chip (NoC) router is introduced. The proposed router integrates low-latency input buffers using a circular FIFO design, and a novel end-to-end credit-based virtual channel (VC) flow control for a replicated switch architecture. This asynchronous router is then compared to an AMD synchronous router, in a realistic advanced 14nm FinFET library...
We survey recent strides made towards building a software framework that is capable of compiling quantum algorithms from a high-level description down to physical gates that can be implemented on a fault-tolerant quantum computer. We discuss why compilation and design automation tools such as the ones in our framework are key for tackling the grand challenge of building a scalable quantum computer...
Vedic maths based multiplier is a novel and high speed multiplier. Adder is one of the main components used in this technique. Using fast adder will enhance the overall performance of the Vedic multiplier. In this work, comparative analysis is done using different adder architectures in Synopsis Design Compiler with different standard cell libraries at 32/28 nm. Various Adder topologies like Ripple...
In FFT computation, the butterflies play a central role, since they allow the calculation of complex terms. Therefore, the optimization of the butterfly can contribute for the power reduction in FFT architectures. In this paper we exploit different addition schemes in order to improve the efficiency of 16 bit-width radix-2 and radix-4 FFT butterflies. Combinations of simultaneous addition of three...
GEMM is the main computational kernel in BLAS3. Its micro-kernel is either hand-crafted in assembly code or generated from C code by general-purpose compilers (guided by architecture-specific directives or auto-tuning). Therefore, either performance or portability suffers. We present a POrtable Compiler Approach, Poca, implemented in LLVM, to automatically generate and optimize this micro-kernel in...
A computer program, at its most basic level is a series of low level processor instructions which are executed sequentially. These instructions take time to execute, thus longer programs have longer execution times. One way to decrease the execution time for a program is to decrease the required time for each instruction. This is called frequency scaling. The disadvantage of frequency scaling is that...
We present ARCHEx, a framework for cyber-physical system architecture exploration. We formulate the exploration problem as a mapping problem, where “virtual” components are mapped into“real”components from pre-defined libraries to minimize an objective function while guaranteeing that system requirements are satisfied. ARCHEx leverages an extensible set of patterns to enable formal, yet flexible,...
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