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The research of a safe Worst-Case Execution Time (WCET) estimation is necessary to build reliable hard, critical real-time systems. Infeasible paths are a major cause of overestimation of theWorst-Case Execution Time (WCET): without data flow constraints, static analysis by implicit path enumeration will take into account semantically impossible, potentially expensive execution paths, making theWorst-Case...
With the increasing technological complexity modern SoC designs continue to grow in size and involve increasingly more IPs. Therefore, it becomes much harder to complete testing of large SoCs within the desired schedule and cost. Usually an automated hierarchical test helps to solve this problem efficiently but for such systems the preparation of input data, especially IP level information and description...
Attendance is a very important factor for many educational institutions in South Africa. The conventional approach of manually taking and managing attendance records is daunting for both the registrar and the registrant. There are existing techniques aimed at providing attendance identification and registry. However, most of these techniques fall short of some very important factors such as scalability,...
Implementing complex arithmetic routines with Single Instruction Multiple Data (SIMD) instructions requires the use of instructions that are usually not found in their real arithmetic counter-parts. These instructions, such as shuffles and addsub, are often bottlenecks for many complex arithmetic kernels as modern architectures usually can perform more real arithmetic operations than execute instructions...
In spite of the multicore revolution, high single thread performance still plays an important role in ensuring a decentoverall gain. Look-ahead is a proven strategy in uncoveringimplicit parallelism; however, a conventional out-of-ordercore quickly becomes resource-inefficient when looking beyond a short distance. An effective approach is to use an in-dependent look-ahead thread running on a separate...
In this paper we propose a vectorized sorted set intersection approach for the task of counting the exact number of triangles of a graph on CPU cores. The computation is factorized into reordering and counting kernels where the reordering kernel builds upon the Reverse Cuthill-McKee heuristic.
Cache leakage reduction techniques usually compromise time predictability, which are not desirable for real-time systems. In this work, we extend the cache decay and drowsy cache techniques within the hardware-based Performance Enhancement Guaranteed Cache (PEG-C) architecture. The PEG-C can dynamically monitor the performance penalties caused by using leakage energy reduction techniques to ensure...
The main formal tasks of the information security risk management process using functional and contextual models reflecting the basic concepts and basic functions of information security risk management systems.
Function recognition in program binaries serves as the foundation for many binary instrumentation and analysis tasks. However, as binaries are usually stripped before distribution, function information is indeed absent in most binaries. By far, identifying functions in stripped binaries remains a challenge. Recent research work proposes to recognize functions in binary code through machine learning...
Processor manufacturers have adopted SIMD for decades because of its superior performance and power efficiency. The configurations of SIMD registers (i.e., the number and width) have evolved and diverged rapidly through various ISA extensions on different architectures. However, migrating legacy or proprietary applications optimized for one guest ISA to another host ISA that has fewer but longer SIMD...
A scan-based side-channel attack is still a real threat against a crypto circuit as well as a hash generator circuit, which can restore secret information by exploiting the scan data obtained from scan chains inside the chip during its processing. In this paper, we propose a scan-based attack method against a hash generator circuit called HMAC-SHA-256. Our proposed method restores the secret information...
The article focuses on the classification of the singing voices into their types: soprano, alto, tenor, bass. The assignment of a singing voice to a type is one of the procedures that can influence the further development of the voice. That classification is usually done by an expert experienced in the field of voice production. Improper voice classification can have a negative impact on vocal development...
In recent years, process mining is important to discover process model from event logs; however the existing methods have not achieved good in overall fitness. In this context, this paper proposes a combination of the Evolutionary Tree Miner (ETM) and Simulated Annealing (SA). The ETM aims to reduce randomness of population so that it can improved the quality of individuals. SA aims to increase overall...
Toward integrating memristors in CMOS-based designs flexible prototyping environments are necessary. However, research in digital memristive systems so far lacks an adequate testing platform for real world devices. To achieve better handson experience, we developed a flexible FPGA-based solution which allows to link memristors with arbitrary compute units such as MIPS, ARM processor cores or own custom...
With the ever increasing amount of electronic components in vehicles and in particular the amount of complex autonomous actions that these components perform, security topics become more and more important in the automotive industry. Not only from a business point of view, as valuable IP assets are contained within these components, but also from a safety point of view, especially when vulnerabilities...
The temperature control system is widely used in the field of industrial control, such as the boiler's temperature control system in Steel, chemical plants and thermal power plants. For the requirements of remote centralized management and security monitor in temperature control system, a temperature control inspection system consisted by down-computer clew and up-computer, is designed in this paper...
This paper presents a Field Programmable Gate Array (FPGA) based implementation of the Fourier Segmentation process that is used in the Empirical Wavelet Transform. The Empirical Wavelet Transform is a method to determine the modes of a given signal by building wavelets that are adapted to the processed signal. Such wavelets are constructed by determining the location of the information in the spectrum...
The efficiency of bit counting operations can have a considerable impact on the performance of file systems, databases, machine learning algorithms and information security systems. Recognizing the great importance of bit counting, recent processors provide hardware implementations of dedicated instructions for efficient population counting. We have previously studied the never ending problem of counting...
Quantum memory-driven computing on the classical computers for design and test of black-box functionality is considered. A method for synthesis and minimization test for the black-box functionality, based on a qubit derivative matrix and sequencer for searching a quasi-optimum coverage, is proposed. Examples of quantum memory-driven design and test minimization of the Schneider logic circuit are presented...
In fields like embedded vision, where algorithms are computationally expensive, hardware accelerators play a major role in high throughput applications. These accelerators could be implemented as hardwired IP cores or Application Specific Instruction-set Processors (ASIPs). While hardwired solutions often provide the best possible performance, they are less flexible then ASIP implementation. In this...
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