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We describe new logic devices based on the storage and shuttling of individual excitons, called the single exciton quantum (SEQ) logic. SEQ logic can implement memory, concatenation, fan-out, and gain. The logic circuits are based on quasi 1-D semiconductors that are coupled to quantum dots (QDs) and on the engineering of their respective exciton states. The coding of binary states is based on the...
Varactors can be used to control delays and limit ISI-related signal integrity degradation for on-chip global interconnect. This paper presents a varactor-based “near-speed-of-light” interconnect design. In this design, the varactors compensate for delay variations enabling a simple, source-synchronous solution for clock-and-data recovery. Furthermore, the varactors provide pulse shaping that reduces...
Current mode (CM) scheme provides suitable alternative for the high speed on-chip interconnect signaling. This paper presents a energy-delay optimization methodology for the current-mode (CM) signaling scheme. Optimization for the CM circuits for on-chip interconnects requires a joint optimization of driver and receiver device sizes, as their parameters which affect the energy-delay performance depend...
This paper describes a design flow for the circuit-level optimization of a technology. The concurrent exploration of device characteristics and library design choices leads to a more application-optimal technology. We illustrate the design flow by: 1) analyzing the impact of buffer cell design, and 2) by optimizing a 130 nm technology for low operational power.
3D contactless technology based on capacitive coupling represents a promising solution for high-speed and low power signaling in vertically integrated chips. AC coupled interconnects do not suffer from mechanical stress, and the parasitic load is much reduced when compared to standard DC solutions, such as wire bonding and micro bumps. Communication system based on wireless interconnection scheme...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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