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For a high-speed and high-resolution current-steering D/A Converter (DAC), Spurious-Free dynamic range (SFDR) becomes a major limiting factor for its performance. This paper gives an overall analysis of its dynamic error due to non-ideal switching behavior and identifies the link between the 3rd or higher order harmonic distortion and digital encoding scheme for the first time so far as our knowledge...
Continuously shrinking design sizes and the integration of digital and analog blocks in a single IC are clearly identifiable trends in today's microelectronics industry. As both trends increase design complexity and concurrently make the outcome of manufacturing processes less predictable, manufacturing yield is potentially endangered. As a countermeasure, new methodologies for the simulation of mixed-signal-circuits...
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