The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
High-speed phase frequency detector (PFD) is one of the key module for high-frequency phase locked loop (PLL) systems. The performance of PLL depends on the operation of PFD. This paper presents a new PFD design in 0.18μm CMOS technology using 3T XOR and 3T NAND gates. Supply voltage has been varied from 1.8V to 2.4V in the proposed design. The new PFD consumes power within a range from 505.78μW to...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.