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In this paper, a novel built-in sensor (BIS) for digital CMOS circuit testing has been proposed. The proposed BIS has no voltage degradation and it is able to detect, identify and localize both open and short circuit faults. Moreover, it has a simple realization with very small area and detection time. A 4×4 multiplier cell is tested by the proposed BIS and all injected faults are detected.
Technology scaling has changed the Static Random Access Memory (SRAM) test scenario, leading to an insufficiency of the usually adopted functional fault models. In this sense, these fault models are no longer able to correctly reproduce the effects caused by some defects generated during the manufacturing process. In this paper, we investigate the possibility of using Built-In Current Sensors (BICSs)...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
Abstract A new method of using Vis/NIR spectroscopy technique to identify the varieties of red wines was studied. Through comparing modeling performance built by different amounts of independent components, 20 independent components (ICs) extracted by independent components analysis (ICA) were employed as the inputs of the BP neural networks and were consider to be important parameter for calibration...
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