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Real-time embedded systems usually integrate multiple functionalities of different criticality levels on a shared hardware platform. For these mixed-criticality real-time systems it is a challenging problem to efficiently utilize system resource to satisfy all the timing constraints on different criticality levels. A simple yet efficient algorithm EDF-VD has recently been proposed to schedule mixed-criticality...
Internet traffic has increased at a very fast pace in recent years. The traffic demand requires that future packet switching systems should be able to switch packets in a very short time, i.e., just a few nanoseconds. Algorithms with lower computation complexity are more desirable for this high-speed switching design. Among the existing algorithms that can achieve 100% throughput for input-queued...
Networks on chips (NoCs) provide a mechanism for handling complex communications in the next generation of integrated circuits. At the same time, lower yield in nano-technology, makes self repair communication channels a necessity in design of digital systems. This paper proposes a reliable NoC architecture based on specific application mapped onto an NoC. This architecture is capable of recovering...
Context-based adaptive variable length coding (CAVLC) is a new and important feature of the H.264/AVC. Based on analysis and modification of the conventional run-length coding architecture, a novel high efficiency VLSI architecture for H.264/AVC CAVLC encoding is presented in this paper. An approach called arithmetic table structure is exploited to replace look-up-table ROM for reducing hardware resource...
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